Lines Matching +full:dma +full:- +full:ranges
1 // SPDX-License-Identifier: GPL-2.0-or-later
9 /dts-v1/;
14 #address-cells = <1>;
15 #size-cells = <1>;
27 #address-cells = <1>;
28 #size-cells = <0>;
33 d-cache-line-size = <32>;
34 i-cache-line-size = <32>;
35 d-cache-size = <32768>;
36 i-cache-size = <32768>;
37 timebase-frequency = <0>;
38 bus-frequency = <0>;
39 clock-frequency = <0>;
40 next-level-cache = <&L2>;
50 #address-cells = <1>;
51 #size-cells = <1>;
53 ranges = <0x0 0xe0000000 0x100000>;
54 bus-frequency = <0>;
55 compatible = "fsl,mpc8560-immr", "simple-bus";
57 ecm-law@0 {
58 compatible = "fsl,ecm-law";
60 fsl,num-laws = <8>;
64 compatible = "fsl,mpc8560-ecm", "fsl,ecm";
67 interrupt-parent = <&mpic>;
70 memory-controller@2000 {
71 compatible = "fsl,mpc8540-memory-controller";
73 interrupt-parent = <&mpic>;
77 L2: l2-cache-controller@20000 {
78 compatible = "fsl,mpc8540-l2-cache-controller";
80 cache-line-size = <32>;
81 cache-size = <0x40000>; // L2, 256K
82 interrupt-parent = <&mpic>;
87 #address-cells = <1>;
88 #size-cells = <0>;
89 cell-index = <0>;
90 compatible = "fsl-i2c";
93 interrupt-parent = <&mpic>;
107 dma@21300 {
108 #address-cells = <1>;
109 #size-cells = <1>;
110 compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
112 ranges = <0x0 0x21100 0x200>;
113 cell-index = <0>;
114 dma-channel@0 {
115 compatible = "fsl,mpc8560-dma-channel",
116 "fsl,eloplus-dma-channel";
118 cell-index = <0>;
119 interrupt-parent = <&mpic>;
122 dma-channel@80 {
123 compatible = "fsl,mpc8560-dma-channel",
124 "fsl,eloplus-dma-channel";
126 cell-index = <1>;
127 interrupt-parent = <&mpic>;
130 dma-channel@100 {
131 compatible = "fsl,mpc8560-dma-channel",
132 "fsl,eloplus-dma-channel";
134 cell-index = <2>;
135 interrupt-parent = <&mpic>;
138 dma-channel@180 {
139 compatible = "fsl,mpc8560-dma-channel",
140 "fsl,eloplus-dma-channel";
142 cell-index = <3>;
143 interrupt-parent = <&mpic>;
149 #address-cells = <1>;
150 #size-cells = <1>;
151 cell-index = <0>;
156 ranges = <0x0 0x24000 0x1000>;
157 local-mac-address = [ 00 00 00 00 00 00 ];
159 interrupt-parent = <&mpic>;
160 tbi-handle = <&tbi0>;
161 phy-handle = <&phy2>;
164 #address-cells = <1>;
165 #size-cells = <0>;
166 compatible = "fsl,gianfar-mdio";
169 phy1: ethernet-phy@1 {
170 interrupt-parent = <&mpic>;
174 phy2: ethernet-phy@2 {
175 interrupt-parent = <&mpic>;
179 phy3: ethernet-phy@3 {
180 interrupt-parent = <&mpic>;
184 tbi0: tbi-phy@11 {
186 device_type = "tbi-phy";
192 #address-cells = <1>;
193 #size-cells = <1>;
194 cell-index = <1>;
199 ranges = <0x0 0x25000 0x1000>;
200 local-mac-address = [ 00 00 00 00 00 00 ];
202 interrupt-parent = <&mpic>;
203 tbi-handle = <&tbi1>;
204 phy-handle = <&phy1>;
207 #address-cells = <1>;
208 #size-cells = <0>;
209 compatible = "fsl,gianfar-tbi";
212 tbi1: tbi-phy@11 {
214 device_type = "tbi-phy";
220 interrupt-controller;
221 #address-cells = <0>;
222 #interrupt-cells = <2>;
224 device_type = "open-pic";
225 compatible = "chrp,open-pic";
229 #address-cells = <1>;
230 #size-cells = <1>;
231 compatible = "fsl,mpc8560-cpm", "fsl,cpm2", "simple-bus";
233 ranges;
236 #address-cells = <1>;
237 #size-cells = <1>;
238 ranges = <0 0x80000 0x10000>;
241 compatible = "fsl,cpm-muram-data";
247 compatible = "fsl,mpc8560-brg",
248 "fsl,cpm2-brg",
249 "fsl,cpm-brg";
251 clock-frequency = <0>;
255 interrupt-controller;
256 #address-cells = <0>;
257 #interrupt-cells = <2>;
259 interrupt-parent = <&mpic>;
261 compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
266 compatible = "fsl,mpc8560-scc-uart",
267 "fsl,cpm2-scc-uart";
269 fsl,cpm-brg = <1>;
270 fsl,cpm-command = <0x800000>;
271 current-speed = <115200>;
273 interrupt-parent = <&cpmpic>;
278 compatible = "fsl,mpc8560-scc-uart",
279 "fsl,cpm2-scc-uart";
281 fsl,cpm-brg = <2>;
282 fsl,cpm-command = <0x4a00000>;
283 current-speed = <115200>;
285 interrupt-parent = <&cpmpic>;
290 compatible = "fsl,mpc8560-fcc-enet",
291 "fsl,cpm2-fcc-enet";
293 local-mac-address = [ 00 00 00 00 00 00 ];
294 fsl,cpm-command = <0x1a400300>;
296 interrupt-parent = <&cpmpic>;
297 phy-handle = <&phy3>;
303 compatible = "fsl,mpc8560-localbus", "fsl,pq3-localbus",
304 "simple-bus";
305 #address-cells = <2>;
306 #size-cells = <1>;
308 interrupt-parent = <&mpic>;
311 ranges = <
318 #address-cells = <1>;
319 #size-cells = <1>;
320 compatible = "cfi-flash";
322 bank-width = <4>;
323 device-width = <1>;
346 label = "u-boot";
348 read-only;
352 /* Note: CAN support needs be enabled in U-Boot */
357 interrupt-parent = <&mpic>;
364 interrupt-parent = <&mpic>;
369 #interrupt-cells = <1>;
370 #size-cells = <2>;
371 #address-cells = <3>;
372 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
375 clock-frequency = <66666666>;
376 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
377 interrupt-map = <
389 interrupt-parent = <&mpic>;
391 bus-range = <0 0>;
392 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000