Lines Matching +full:dma +full:- +full:ranges

15 /dts-v1/;
20 #address-cells = <1>;
21 #size-cells = <1>;
30 #address-cells = <1>;
31 #size-cells = <0>;
36 d-cache-line-size = <32>;
37 i-cache-line-size = <32>;
38 d-cache-size = <0x8000>; /* L1, 32K */
39 i-cache-size = <0x8000>; /* L1, 32K */
40 timebase-frequency = <0>; /* From U-boot */
41 bus-frequency = <0>; /* From U-boot */
42 clock-frequency = <0>; /* From U-boot */
43 next-level-cache = <&L2>;
53 #address-cells = <1>;
54 #size-cells = <1>;
56 ranges = <0x00000000 0xfdf00000 0x00100000>;
57 bus-frequency = <0>; /* Fixed by bootwrapper */
59 ecm-law@0 {
60 compatible = "fsl,ecm-law";
62 fsl,num-laws = <8>;
66 compatible = "fsl,mpc8560-ecm", "fsl,ecm";
69 interrupt-parent = <&mpic>;
72 memory-controller@2000 {
73 compatible = "fsl,mpc8540-memory-controller";
75 interrupt-parent = <&mpic>;
79 L2: l2-cache-controller@20000 {
80 compatible = "fsl,mpc8540-l2-cache-controller";
82 cache-line-size = <0x20>; /* 32 bytes */
83 cache-size = <0x40000>; /* L2, 256K */
84 interrupt-parent = <&mpic>;
89 #address-cells = <1>;
90 #size-cells = <0>;
91 cell-index = <0>;
92 compatible = "fsl-i2c";
95 interrupt-parent = <&mpic>;
99 dma@21300 {
100 #address-cells = <1>;
101 #size-cells = <1>;
102 compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
104 ranges = <0x0 0x21100 0x200>;
105 cell-index = <0>;
106 dma-channel@0 {
107 compatible = "fsl,mpc8560-dma-channel",
108 "fsl,eloplus-dma-channel";
110 cell-index = <0>;
111 interrupt-parent = <&mpic>;
114 dma-channel@80 {
115 compatible = "fsl,mpc8560-dma-channel",
116 "fsl,eloplus-dma-channel";
118 cell-index = <1>;
119 interrupt-parent = <&mpic>;
122 dma-channel@100 {
123 compatible = "fsl,mpc8560-dma-channel",
124 "fsl,eloplus-dma-channel";
126 cell-index = <2>;
127 interrupt-parent = <&mpic>;
130 dma-channel@180 {
131 compatible = "fsl,mpc8560-dma-channel",
132 "fsl,eloplus-dma-channel";
134 cell-index = <3>;
135 interrupt-parent = <&mpic>;
141 #address-cells = <1>;
142 #size-cells = <1>;
147 ranges = <0x0 0x24000 0x1000>;
149 local-mac-address = [ 00 00 00 00 00 00 ];
151 interrupt-parent = <&mpic>;
152 tbi-handle = <&tbi0>;
153 phy-handle = <&PHY1>;
156 #address-cells = <1>;
157 #size-cells = <0>;
158 compatible = "fsl,gianfar-mdio";
161 PHY1: ethernet-phy@1 {
162 interrupt-parent = <&mpic>;
166 PHY2: ethernet-phy@2 {
167 interrupt-parent = <&mpic>;
171 tbi0: tbi-phy@11 {
173 device_type = "tbi-phy";
179 #address-cells = <1>;
180 #size-cells = <1>;
185 ranges = <0x0 0x25000 0x1000>;
187 local-mac-address = [ 00 00 00 00 00 00 ];
189 interrupt-parent = <&mpic>;
190 tbi-handle = <&tbi1>;
191 phy-handle = <&PHY2>;
194 #address-cells = <1>;
195 #size-cells = <0>;
196 compatible = "fsl,gianfar-tbi";
199 tbi1: tbi-phy@11 {
201 device_type = "tbi-phy";
207 #address-cells = <0>;
208 #interrupt-cells = <2>;
209 interrupt-controller;
211 device_type = "open-pic";
215 #address-cells = <1>;
216 #size-cells = <1>;
217 compatible = "fsl,mpc8560-cpm", "fsl,cpm2";
219 ranges;
222 #address-cells = <1>;
223 #size-cells = <1>;
224 ranges = <0x0 0x80000 0x10000>;
227 compatible = "fsl,cpm-muram-data";
233 compatible = "fsl,mpc8560-brg",
234 "fsl,cpm2-brg",
235 "fsl,cpm-brg";
237 clock-frequency = <165000000>; /* 166MHz */
241 #address-cells = <0>;
242 #interrupt-cells = <2>;
243 interrupt-controller;
245 interrupt-parent = <&mpic>;
247 compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
252 compatible = "fsl,mpc8560-scc-uart",
253 "fsl,cpm2-scc-uart";
255 fsl,cpm-brg = <1>;
256 fsl,cpm-command = <0x800000>;
257 current-speed = <0x1c200>;
259 interrupt-parent = <&CPMPIC>;
264 compatible = "fsl,mpc8560-scc-uart",
265 "fsl,cpm2-scc-uart";
267 fsl,cpm-brg = <2>;
268 fsl,cpm-command = <0x4a00000>;
269 current-speed = <0x1c200>;
271 interrupt-parent = <&CPMPIC>;
275 #address-cells = <1>;
276 #size-cells = <0>;
277 compatible = "fsl,cpm2-mdio-bitbang";
279 fsl,mdio-pin = <24>;
280 fsl,mdc-pin = <25>;
282 PHY0: ethernet-phy@0 {
283 interrupt-parent = <&mpic>;
290 compatible = "fsl,mpc8560-fcc-enet",
291 "fsl,cpm2-fcc-enet";
294 local-mac-address = [ 00 00 00 00 00 00 ];
295 fsl,cpm-command = <0x12000300>;
297 interrupt-parent = <&CPMPIC>;
298 phy-handle = <&PHY0>;
304 #address-cells = <2>;
305 #size-cells = <1>;
306 compatible = "fsl,mpc8560-localbus", "simple-bus";
309 ranges = <0x0 0x0 0xe0000000 0x00800000
313 #address-cells = <1>;
314 #size-cells = <1>;
315 compatible = "jedec-flash";
317 bank-width = <0x2>;
330 read-only;
335 compatible = "emerson,KSI8560-cpld";
342 stdout-path = "/soc/cpm/serial@91a00";