Lines Matching +full:- +full:1
1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2008-2009 Freescale Semiconductor Inc.
8 /include/ "mpc8641si-pre.dtsi"
13 #address-cells = <2>;
14 #size-cells = <2>;
18 reg = <0x0 0x00000000 0x0 0x40000000>; // 1G at 0x0
29 compatible = "cfi-flash";
31 bank-width = <2>;
32 device-width = <2>;
33 #address-cells = <1>;
34 #size-cells = <1>;
42 read-only;
51 read-only;
60 tbi-handle = <&tbi0>;
61 phy-handle = <&phy0>;
62 phy-connection-type = "rgmii-id";
66 phy0: ethernet-phy@0 {
67 interrupts = <10 1 0 0>;
70 phy1: ethernet-phy@1 {
71 interrupts = <10 1 0 0>;
72 reg = <1>;
74 phy2: ethernet-phy@2 {
75 interrupts = <10 1 0 0>;
78 phy3: ethernet-phy@3 {
79 interrupts = <10 1 0 0>;
82 tbi0: tbi-phy@11 {
84 device_type = "tbi-phy";
89 tbi-handle = <&tbi1>;
90 phy-handle = <&phy1>;
91 phy-connection-type = "rgmii-id";
95 tbi1: tbi-phy@11 {
97 device_type = "tbi-phy";
102 tbi-handle = <&tbi2>;
103 phy-handle = <&phy2>;
104 phy-connection-type = "rgmii-id";
108 tbi2: tbi-phy@11 {
110 device_type = "tbi-phy";
115 tbi-handle = <&tbi3>;
116 phy-handle = <&phy3>;
117 phy-connection-type = "rgmii-id";
121 tbi3: tbi-phy@11 {
123 device_type = "tbi-phy";
132 interrupt-map-mask = <0xff00 0 0 7>;
133 interrupt-map = <
134 /* IDSEL 0x11 func 0 - PCI slot 1 */
135 0x8800 0 0 1 &mpic 2 1 0 0
136 0x8800 0 0 2 &mpic 3 1 0 0
137 0x8800 0 0 3 &mpic 4 1 0 0
138 0x8800 0 0 4 &mpic 1 1 0 0
140 /* IDSEL 0x11 func 1 - PCI slot 1 */
141 0x8900 0 0 1 &mpic 2 1 0 0
142 0x8900 0 0 2 &mpic 3 1 0 0
143 0x8900 0 0 3 &mpic 4 1 0 0
144 0x8900 0 0 4 &mpic 1 1 0 0
146 /* IDSEL 0x11 func 2 - PCI slot 1 */
147 0x8a00 0 0 1 &mpic 2 1 0 0
148 0x8a00 0 0 2 &mpic 3 1 0 0
149 0x8a00 0 0 3 &mpic 4 1 0 0
150 0x8a00 0 0 4 &mpic 1 1 0 0
152 /* IDSEL 0x11 func 3 - PCI slot 1 */
153 0x8b00 0 0 1 &mpic 2 1 0 0
154 0x8b00 0 0 2 &mpic 3 1 0 0
155 0x8b00 0 0 3 &mpic 4 1 0 0
156 0x8b00 0 0 4 &mpic 1 1 0 0
158 /* IDSEL 0x11 func 4 - PCI slot 1 */
159 0x8c00 0 0 1 &mpic 2 1 0 0
160 0x8c00 0 0 2 &mpic 3 1 0 0
161 0x8c00 0 0 3 &mpic 4 1 0 0
162 0x8c00 0 0 4 &mpic 1 1 0 0
164 /* IDSEL 0x11 func 5 - PCI slot 1 */
165 0x8d00 0 0 1 &mpic 2 1 0 0
166 0x8d00 0 0 2 &mpic 3 1 0 0
167 0x8d00 0 0 3 &mpic 4 1 0 0
168 0x8d00 0 0 4 &mpic 1 1 0 0
170 /* IDSEL 0x11 func 6 - PCI slot 1 */
171 0x8e00 0 0 1 &mpic 2 1 0 0
172 0x8e00 0 0 2 &mpic 3 1 0 0
173 0x8e00 0 0 3 &mpic 4 1 0 0
174 0x8e00 0 0 4 &mpic 1 1 0 0
176 /* IDSEL 0x11 func 7 - PCI slot 1 */
177 0x8f00 0 0 1 &mpic 2 1 0 0
178 0x8f00 0 0 2 &mpic 3 1 0 0
179 0x8f00 0 0 3 &mpic 4 1 0 0
180 0x8f00 0 0 4 &mpic 1 1 0 0
182 /* IDSEL 0x12 func 0 - PCI slot 2 */
183 0x9000 0 0 1 &mpic 3 1 0 0
184 0x9000 0 0 2 &mpic 4 1 0 0
185 0x9000 0 0 3 &mpic 1 1 0 0
186 0x9000 0 0 4 &mpic 2 1 0 0
188 /* IDSEL 0x12 func 1 - PCI slot 2 */
189 0x9100 0 0 1 &mpic 3 1 0 0
190 0x9100 0 0 2 &mpic 4 1 0 0
191 0x9100 0 0 3 &mpic 1 1 0 0
192 0x9100 0 0 4 &mpic 2 1 0 0
194 /* IDSEL 0x12 func 2 - PCI slot 2 */
195 0x9200 0 0 1 &mpic 3 1 0 0
196 0x9200 0 0 2 &mpic 4 1 0 0
197 0x9200 0 0 3 &mpic 1 1 0 0
198 0x9200 0 0 4 &mpic 2 1 0 0
200 /* IDSEL 0x12 func 3 - PCI slot 2 */
201 0x9300 0 0 1 &mpic 3 1 0 0
202 0x9300 0 0 2 &mpic 4 1 0 0
203 0x9300 0 0 3 &mpic 1 1 0 0
204 0x9300 0 0 4 &mpic 2 1 0 0
206 /* IDSEL 0x12 func 4 - PCI slot 2 */
207 0x9400 0 0 1 &mpic 3 1 0 0
208 0x9400 0 0 2 &mpic 4 1 0 0
209 0x9400 0 0 3 &mpic 1 1 0 0
210 0x9400 0 0 4 &mpic 2 1 0 0
212 /* IDSEL 0x12 func 5 - PCI slot 2 */
213 0x9500 0 0 1 &mpic 3 1 0 0
214 0x9500 0 0 2 &mpic 4 1 0 0
215 0x9500 0 0 3 &mpic 1 1 0 0
216 0x9500 0 0 4 &mpic 2 1 0 0
218 /* IDSEL 0x12 func 6 - PCI slot 2 */
219 0x9600 0 0 1 &mpic 3 1 0 0
220 0x9600 0 0 2 &mpic 4 1 0 0
221 0x9600 0 0 3 &mpic 1 1 0 0
222 0x9600 0 0 4 &mpic 2 1 0 0
224 /* IDSEL 0x12 func 7 - PCI slot 2 */
225 0x9700 0 0 1 &mpic 3 1 0 0
226 0x9700 0 0 2 &mpic 4 1 0 0
227 0x9700 0 0 3 &mpic 1 1 0 0
228 0x9700 0 0 4 &mpic 2 1 0 0
231 0xe000 0 0 1 &i8259 12 2
237 0xe800 0 0 1 &i8259 6 2
240 0xf000 0 0 1 &i8259 7 2
241 0xf100 0 0 1 &i8259 7 2
244 0xf800 0 0 1 &i8259 14 2
245 0xf900 0 0 1 &i8259 5 2
258 #size-cells = <2>;
259 #address-cells = <3>;
266 isa@1e {
268 #size-cells = <1>;
269 #address-cells = <2>;
271 ranges = <1 0 0x01000000 0 0
273 interrupt-parent = <&i8259>;
275 i8259: interrupt-controller@20 {
276 reg = <1 0x20 2
277 1 0xa0 2
278 1 0x4d0 2>;
279 interrupt-controller;
280 device_type = "interrupt-controller";
281 #address-cells = <0>;
282 #interrupt-cells = <2>;
288 #size-cells = <0>;
289 #address-cells = <1>;
290 reg = <1 0x60 1 1 0x64 1>;
291 interrupts = <1 3 12 3>;
292 interrupt-parent = <&i8259>;
299 mouse@1 {
300 reg = <1>;
308 reg = <1 0x70 2>;
312 reg = <1 0x400 0x80>;
337 /include/ "mpc8641si-post.dtsi"