include/asm/dma.h

1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* asm/dma.h: Defines for using and allocating dma channels.
4  * High DMA channel support & info by Hannu Savolainen
18 ** DMA_CHUNK_SIZE is used by the SCSI mid-layer to break up
26 /* The maximum address that we can perform a DMA transfer to on this platform
27 ** New dynamic DMA interfaces should obsolete this....
32 ** We don't have DMA channels... well V-class does but the
33 ** Dynamic DMA Mapping interface will support them... right? :^)
34 ** Note: this is not relevant right now for PA-RISC, but we cannot
36 ** won't compile :-(
41 #define DMA_MODE_CASCADE 0xC0	/* pass thru DREQ->HRQ, DACK<-HLDA only */
45 /* 8237 DMA controllers */
46 #define IO_DMA1_BASE	0x00	/* 8 bit slave DMA, channels 0..3 */
47 #define IO_DMA2_BASE	0xC0	/* 16 bit master DMA, ch 4(=slave input)..7 */
49 /* DMA controller registers */
53 #define DMA1_MASK_REG		0x0A	/* single-channel mask (w) */
55 #define DMA1_CLEAR_FF_REG	0x0C	/* clear pointer flip-flop (w) */
58 #define DMA1_CLR_MASK_REG       0x0E    /* Clear Mask */
59 #define DMA1_MASK_ALL_REG       0x0F    /* all-channels mask (w) */
65 #define DMA2_MASK_REG		0xD4	/* single-channel mask (w) */
67 #define DMA2_CLEAR_FF_REG	0xD8	/* clear pointer flip-flop (w) */
70 #define DMA2_CLR_MASK_REG       0xDC    /* Clear Mask */
71 #define DMA2_MASK_ALL_REG       0xDE    /* all-channels mask (w) */
84 /* Get DMA residue count. After a DMA transfer, this
85  * should return zero. Reading this while a DMA transfer is
87  * If called before the channel has been used, it may return 1.
90  * Assumes DMA flip-flop is clear.
97 	/* using short to get 16-bit wrap around */  in get_dma_residue()
106 /* enable/disable a specific DMA channel */
127 /* reserve a DMA channel */
130 /* Clear the 'DMA Pointer Flip Flop'.
133  * After that, keep track of it. :-)
134  * --- In order to do that, the DMA routines below should ---
135  * --- only be used while holding the DMA lock ! ---
141 /* set mode (above) for a specific DMA channel */
148  * the lower 16 bits of the DMA current address register, but a 64k boundary
156 /* Set transfer address & page bits for specific DMA channel.
157  * Assumes dma flipflop is clear.
165  * a specific DMA channel.
169  * Assumes dma flip-flop is clear.
170  * NOTE 2: "count" represents _bytes_ and must be even for channels 5-7.