openrisc/mm/init.c

1 // SPDX-License-Identifier: GPL-2.0-or-later
11  * Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se>
34 #include <asm/tlb.h>
62  * This is explicitly coded for two-level page tables, so if you need
75 	u64 i;  in map_ram()  local
76 	/* These mark extents of read-only kernel pages...  in map_ram()
83 	for_each_mem_range(i, &start, &end) {  in map_ram()
98 				      "two-level page tables",  in map_ram()
124 		printk(KERN_INFO "%s: Memory: 0x%x-0x%x\n", __func__,  in map_ram()
125 		       region->base, region->base + region->size);  in map_ram()
134 	int i;  in paging_init()  local
140 	for (i = 0; i < PTRS_PER_PGD; i++)  in paging_init()
141 		swapper_pg_dir[i] = __pgd(0);  in paging_init()
156 	/* Since the old TLB miss handler has been running up until now,  in paging_init()
158 	 * text directly... after this change and a TLB flush, the kernel  in paging_init()
169 		*itlb_vector = ((unsigned long)&itlb_miss_handler -  in paging_init()
178 		*dtlb_vector = ((unsigned long)&dtlb_miss_handler -  in paging_init()
184 	 * TLB flush really happen _after_ code has been modified.  in paging_init()
192 	/* New TLB miss handlers and kernel page tables are in now place.  in paging_init()
193 	 * Make sure that page flags get updated for all pages in TLB by  in paging_init()
194 	 * flushing the TLB and forcing all TLB entries to be recreated  in paging_init()
209 	/* clear the zero-page */  in mem_init()