Lines Matching +full:d +full:- +full:tlb +full:- +full:sets
1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (C) 2005-2017 Andes Technology Corporation
10 #include <linux/dma-mapping.h>
15 #include <asm/proc-fns.h>
102 pr_info("CPU%d Features: %s\n", cpu, str); in dump_cpu_info()
106 L1_cache_info[ICACHE].sets = CACHE_SET(ICACHE); in dump_cpu_info()
109 L1_cache_info[ICACHE].sets / 1024; in dump_cpu_info()
111 L1_cache_info[ICACHE].sets, L1_cache_info[ICACHE].ways, in dump_cpu_info()
115 L1_cache_info[DCACHE].sets = CACHE_SET(DCACHE); in dump_cpu_info()
118 L1_cache_info[DCACHE].sets / 1024; in dump_cpu_info()
120 L1_cache_info[DCACHE].sets, L1_cache_info[DCACHE].ways, in dump_cpu_info()
122 pr_info("L1 D-Cache is %s\n", WRITE_METHOD); in dump_cpu_info()
125 ("The cache line size(%d) of this processor is not the same as L1_CACHE_BYTES(%d).\n", in dump_cpu_info()
135 (aliasing_num - 1) << PAGE_SHIFT; in dump_cpu_info()
141 (aliasing_num - 1) << PAGE_SHIFT; in dump_cpu_info()
161 cpu_series = cpu_name ? cpu_name - 10 + 'A' : 'N'; in setup_cpuinfo()
264 if (max_pfn - ram_start_pfn <= MAXMEM_PFN) in setup_memory()
276 * initialize the boot-time allocator (with low memory only). in setup_memory()
282 memblock_reserve(PFN_PHYS(ram_start_pfn), PFN_PHYS(free_ram_start_pfn - ram_start_pfn)); in setup_memory()
305 /* paging_init() sets up the MMU and marks all pages as reserved */ in setup_arch()
308 /* invalidate all TLB entries because the new mapping is created */ in setup_arch()