mips/pistachio/init.c

28  * Bits 7 to 0: Maintenance rev
30 #define PISTACHIO_CORE_REV_REG	0xB81483D0
31 #define PISTACHIO_CORE_REV_A1	0x00100006
32 #define PISTACHIO_CORE_REV_B0	0x00100106
70 #define DEFAULT_CPC_BASE_ADDR	0x1bde0000
71 #define DEFAULT_CDMM_BASE_ADDR	0x1bdd0000
89 		(void *)(CAC_BASE + 0xa80) :  in mips_nmi_setup()
90 		(void *)(CAC_BASE + 0x380);  in mips_nmi_setup()
91 	memcpy(base, except_vec_nmi, 0x80);  in mips_nmi_setup()
93 			   (unsigned long)base + 0x80);  in mips_nmi_setup()
102 		(void *)(CAC_BASE + 0xa00) :  in mips_ejtag_setup()
103 		(void *)(CAC_BASE + 0x300);  in mips_ejtag_setup()
104 	memcpy(base, except_vec_ejtag_debug, 0x80);  in mips_ejtag_setup()
106 			   (unsigned long)base + 0x80);  in mips_ejtag_setup()