Lines Matching +full:0 +full:x10001
41 #define FMN_STNID_CPU0 0x00
42 #define FMN_STNID_CPU1 0x08
43 #define FMN_STNID_CPU2 0x10
44 #define FMN_STNID_CPU3 0x18
45 #define FMN_STNID_CPU4 0x20
46 #define FMN_STNID_CPU5 0x28
47 #define FMN_STNID_CPU6 0x30
48 #define FMN_STNID_CPU7 0x38
178 #define nlm_read_c2_status0() __read_32bit_c2_register($2, 0)
179 #define nlm_write_c2_status0(v) __write_32bit_c2_register($2, 0, v)
182 #define nlm_read_c2_status(sel) __read_32bit_c2_register($2, 0)
183 #define nlm_read_c2_config() __read_32bit_c2_register($3, 0)
184 #define nlm_write_c2_config(v) __write_32bit_c2_register($3, 0, v)
188 #define nlm_read_c2_rx_msg0() __read_64bit_c2_register($1, 0)
193 #define nlm_write_c2_tx_msg0(v) __write_64bit_c2_register($0, 0, v)
194 #define nlm_write_c2_tx_msg1(v) __write_64bit_c2_register($0, 1, v)
195 #define nlm_write_c2_tx_msg2(v) __write_64bit_c2_register($0, 2, v)
196 #define nlm_write_c2_tx_msg3(v) __write_64bit_c2_register($0, 3, v)
208 "move $1, %0\n" in nlm_msgsnd()
209 "c2 0x10001\n" /* msgsnd $1 */ in nlm_msgsnd()
221 "move $1, %0\n" in nlm_msgld()
222 "c2 0x10002\n" /* msgld $1 */ in nlm_msgld()
234 "move $8, %0\n" in nlm_msgwait()
235 "c2 0x10003\n" /* msgwait $1 */ in nlm_msgwait()
264 | 0x2; /* enable watermark intr, disable empty intr */ in nlm_fmn_setup_intr()
301 for (i = 0; i < 8; i++) { in nlm_fmn_send()
304 if ((status & 0x4) == 0) in nlm_fmn_send()
305 return 0; in nlm_fmn_send()
309 return status & 0x06; in nlm_fmn_send()
322 } while ((status & 0x08) != 0); in nlm_fmn_receive()
325 tmp = status & 0x30; in nlm_fmn_receive()
326 if (tmp != 0) in nlm_fmn_receive()
329 *size = ((status & 0xc0) >> 6) + 1; in nlm_fmn_receive()
330 *code = (status & 0xff00) >> 8; in nlm_fmn_receive()
331 *stid = (status & 0x7f0000) >> 16; in nlm_fmn_receive()
337 return 0; in nlm_fmn_receive()