Lines Matching +full:cs +full:- +full:3

6  * Copyright (C) 2004-2017 Cavium, Inc.
16 #include <asm/octeon/cvmx-helper-board.h>
22 #include <asm/octeon/cvmx-uctlx-defs.h>
76 if (dev->of_node) { in octeon2_usb_clocks_start()
80 uctl_node = of_get_parent(dev->of_node); in octeon2_usb_clocks_start()
86 "refclk-frequency", &clock_rate); in octeon2_usb_clocks_start()
88 dev_err(dev, "No UCTL \"refclk-frequency\"\n"); in octeon2_usb_clocks_start()
92 "refclk-type", &clock_type); in octeon2_usb_clocks_start()
119 /* Step 3: Configure the reference clock, PHY, and HCLK */ in octeon2_usb_clocks_start()
128 /* 3a */ in octeon2_usb_clocks_start()
138 /* 3b */ in octeon2_usb_clocks_start()
157 /* 3c */ in octeon2_usb_clocks_start()
166 case 3: in octeon2_usb_clocks_start()
192 /* 3d */ in octeon2_usb_clocks_start()
196 /* 3e: delay 64 io clocks */ in octeon2_usb_clocks_start()
200 * Step 4: Program the power-on reset field in the UCTL in octeon2_usb_clocks_start()
201 * clock-reset-control register. in octeon2_usb_clocks_start()
206 /* Step 5: Wait 3 ms for the PHY clock to start. */ in octeon2_usb_clocks_start()
207 mdelay(3); in octeon2_usb_clocks_start()
262 octeon2_usb_clock_start_cnt--; in octeon2_usb_clocks_stop()
268 octeon2_usb_clocks_start(&pdev->dev); in octeon_ehci_power_on()
298 /* Use 64-bit addressing. */ in octeon_ehci_hw_start()
329 pd->dev.platform_data = &octeon_ehci_pdata; in octeon_ehci_device_init()
330 octeon_ehci_hw_start(&pd->dev); in octeon_ehci_device_init()
338 octeon2_usb_clocks_start(&pdev->dev); in octeon_ohci_power_on()
392 pd->dev.platform_data = &octeon_ohci_pdata; in octeon_ohci_device_init()
393 octeon_ohci_hw_start(&pd->dev); in octeon_ohci_device_init()
419 pd = platform_device_alloc("octeon_rng", -1); in octeon_rng_device_init()
421 ret = -ENOMEM; in octeon_rng_device_init()
444 { .compatible = "simple-bus", },
445 { .compatible = "cavium,octeon-6335-uctl", },
446 { .compatible = "cavium,octeon-5750-usbn", },
447 { .compatible = "cavium,octeon-3860-bootbus", },
448 { .compatible = "cavium,mdio-mux", },
449 { .compatible = "gpio-leds", },
450 { .compatible = "cavium,octeon-7130-usb-uctl", },
463 switch (cvmx_sysinfo_get()->board_type) { in octeon_has_fixed_link()
490 phy_handle = fdt_getprop(initial_boot_params, eth, "phy-handle", NULL); in octeon_fdt_set_phy()
497 alt_phy_handle = fdt_getprop(initial_boot_params, eth, "cavium,alt-phy-handle", NULL); in octeon_fdt_set_phy()
503 alt_phy = -1; in octeon_fdt_set_phy()
508 fdt_nop_property(initial_boot_params, eth, "phy-handle"); in octeon_fdt_set_phy()
510 fdt_nop_property(initial_boot_params, eth, "cavium,alt-phy-handle"); in octeon_fdt_set_phy()
524 phy_prop = fdt_get_property(initial_boot_params, eth, "phy-handle", NULL); in octeon_fdt_set_phy()
525 phy_handle_name = phy_prop->nameoff; in octeon_fdt_set_phy()
527 fdt_nop_property(initial_boot_params, eth, "phy-handle"); in octeon_fdt_set_phy()
528 alt_prop = fdt_get_property_w(initial_boot_params, eth, "cavium,alt-phy-handle", NULL); in octeon_fdt_set_phy()
529 alt_prop->nameoff = phy_handle_name; in octeon_fdt_set_phy()
536 fdt_nop_property(initial_boot_params, phy, "marvell,reg-init"); in octeon_fdt_set_phy()
552 snprintf(new_name, sizeof(new_name), "ethernet-phy@%x", phy_addr); in octeon_fdt_set_phy()
569 old_mac = fdt_getprop(initial_boot_params, n, "local-mac-address", in octeon_fdt_set_mac_addr()
577 new_mac[3] = (mac >> 16) & 0xff; in octeon_fdt_set_mac_addr()
581 r = fdt_setprop_inplace(initial_boot_params, n, "local-mac-address", in octeon_fdt_set_mac_addr()
585 pr_err("Setting \"local-mac-address\" failed %d", r); in octeon_fdt_set_mac_addr()
595 phy_handle = fdt_getprop(initial_boot_params, node, "phy-handle", NULL); in octeon_fdt_rm_ethernet()
608 fdt_setprop_inplace_cell(initial_boot_params, eth, "rx-delay", in _octeon_rx_tx_delay()
610 fdt_setprop_inplace_cell(initial_boot_params, eth, "tx-delay", in _octeon_rx_tx_delay()
616 switch (cvmx_sysinfo_get()->board_type) { in octeon_rx_tx_delay()
641 fdt_nop_property(initial_boot_params, eth, "rx-delay"); in octeon_rx_tx_delay()
642 fdt_nop_property(initial_boot_params, eth, "tx-delay"); in octeon_rx_tx_delay()
670 fixed_link = fdt_subnode_offset(initial_boot_params, eth, "fixed-link"); in octeon_fdt_pip_port()
694 octeon_fdt_pip_port(iface, idx, p, count - 1); in octeon_fdt_pip_iface()
711 ((octeon_bootinfo->mac_addr_base[0] & 0xffull)) << 40 | in octeon_fill_mac_addresses()
712 ((octeon_bootinfo->mac_addr_base[1] & 0xffull)) << 32 | in octeon_fill_mac_addresses()
713 ((octeon_bootinfo->mac_addr_base[2] & 0xffull)) << 24 | in octeon_fill_mac_addresses()
714 ((octeon_bootinfo->mac_addr_base[3] & 0xffull)) << 16 | in octeon_fill_mac_addresses()
715 ((octeon_bootinfo->mac_addr_base[4] & 0xffull)) << 8 | in octeon_fill_mac_addresses()
716 (octeon_bootinfo->mac_addr_base[5] & 0xffull); in octeon_fill_mac_addresses()
774 WARN(octeon_bootinfo->board_type == CVMX_BOARD_TYPE_CUST_DSR1000N, in octeon_prune_device_tree()
775 "Built-in DTB booting is deprecated on %s. Please switch to use appended DTB.", in octeon_prune_device_tree()
776 cvmx_board_type_to_string(octeon_bootinfo->board_type)); in octeon_prune_device_tree()
781 return -EINVAL; in octeon_prune_device_tree()
791 if (octeon_bootinfo->board_type == CVMX_BOARD_TYPE_NIC10E) in octeon_prune_device_tree()
888 uart_mask = 3; in octeon_prune_device_tree()
894 for (i = 0; i < 3; i++) { in octeon_prune_device_tree()
909 uart, "clock-frequency", in octeon_prune_device_tree()
928 int cs, bootbus; in octeon_prune_device_tree() local
938 if (octeon_bootinfo->major_version == 1 in octeon_prune_device_tree()
939 && octeon_bootinfo->minor_version >= 1) { in octeon_prune_device_tree()
940 if (octeon_bootinfo->compact_flash_common_base_addr) in octeon_prune_device_tree()
941 base_ptr = octeon_bootinfo->compact_flash_common_base_addr; in octeon_prune_device_tree()
950 for (cs = 0; cs < 8; cs++) { in octeon_prune_device_tree()
951 mio_boot_reg_cfg.u64 = cvmx_read_csr(CVMX_MIO_BOOT_REG_CFGX(cs)); in octeon_prune_device_tree()
960 if (cs >= 7) { in octeon_prune_device_tree()
961 /* cs and cs + 1 are CS0 and CS1, both must be less than 8. */ in octeon_prune_device_tree()
974 cvmx_read_csr(CVMX_MIO_BOOT_REG_CFGX(cs + 1)); in octeon_prune_device_tree()
982 fdt_nop_property(initial_boot_params, cf, "cavium,true-ide"); in octeon_prune_device_tree()
983 fdt_nop_property(initial_boot_params, cf, "cavium,dma-engine-handle"); in octeon_prune_device_tree()
988 "cavium,bus-width", &width, sizeof(width)); in octeon_prune_device_tree()
991 new_reg[0] = cpu_to_be32(cs); in octeon_prune_device_tree()
994 new_reg[3] = cpu_to_be32(cs + 1); in octeon_prune_device_tree()
1007 ranges[(cs * 5) + 2] = cpu_to_be32(region_base >> 32); in octeon_prune_device_tree()
1008 ranges[(cs * 5) + 3] = cpu_to_be32(region_base & 0xffffffff); in octeon_prune_device_tree()
1009 ranges[(cs * 5) + 4] = cpu_to_be32(region_size); in octeon_prune_device_tree()
1011 cs++; in octeon_prune_device_tree()
1012 ranges[(cs * 5) + 2] = cpu_to_be32(region1_base >> 32); in octeon_prune_device_tree()
1013 ranges[(cs * 5) + 3] = cpu_to_be32(region1_base & 0xffffffff); in octeon_prune_device_tree()
1014 ranges[(cs * 5) + 4] = cpu_to_be32(region1_size); in octeon_prune_device_tree()
1030 int cs, bootbus; in octeon_prune_device_tree() local
1036 base_ptr = octeon_bootinfo->led_display_base_addr; in octeon_prune_device_tree()
1040 for (cs = 0; cs < 8; cs++) { in octeon_prune_device_tree()
1041 mio_boot_reg_cfg.u64 = cvmx_read_csr(CVMX_MIO_BOOT_REG_CFGX(cs)); in octeon_prune_device_tree()
1049 if (cs > 7) in octeon_prune_device_tree()
1052 new_reg[0] = cpu_to_be32(cs); in octeon_prune_device_tree()
1055 new_reg[3] = cpu_to_be32(cs); in octeon_prune_device_tree()
1068 ranges[(cs * 5) + 2] = cpu_to_be32(region_base >> 32); in octeon_prune_device_tree()
1069 ranges[(cs * 5) + 3] = cpu_to_be32(region_base & 0xffffffff); in octeon_prune_device_tree()
1070 ranges[(cs * 5) + 4] = cpu_to_be32(region_size); in octeon_prune_device_tree()
1087 octeon_bootinfo->board_type == CVMX_BOARD_TYPE_NIC2E)) { in octeon_prune_device_tree()
1091 } else if (octeon_bootinfo->board_type == CVMX_BOARD_TYPE_NIC10E || in octeon_prune_device_tree()
1092 octeon_bootinfo->board_type == CVMX_BOARD_TYPE_NIC4E) { in octeon_prune_device_tree()
1093 /* Missing "refclk-type" defaults to crystal. */ in octeon_prune_device_tree()
1094 fdt_nop_property(initial_boot_params, uctl, "refclk-type"); in octeon_prune_device_tree()
1118 "refclk-frequency", new_f, sizeof(new_f)); in octeon_prune_device_tree()
1121 /* Missing "refclk-type" defaults to external. */ in octeon_prune_device_tree()
1122 fdt_nop_property(initial_boot_params, usbn, "refclk-type"); in octeon_prune_device_tree()