dts/netlogic/xlp_fvp.dts

1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 	model = "netlogic,XLP-FVP";
10 	#address-cells = <2>;
11 	#size-cells = <2>;
14 		#address-cells = <2>;
15 		#size-cells = <1>;
16 		compatible = "simple-bus";
23 			reg = <0 0x30100 0xa00>;
24 			reg-shift = <2>;
25 			reg-io-width = <4>;
26 			clock-frequency = <133333333>;
27 			interrupt-parent = <&pic>;
33 			reg = <0 0x31100 0xa00>;
34 			reg-shift = <2>;
35 			reg-io-width = <4>;
36 			clock-frequency = <133333333>;
37 			interrupt-parent = <&pic>;
41 			compatible = "opencores,i2c-ocores";
42 			#address-cells = <1>;
43 			#size-cells = <0>;
44 			reg = <0 0x37100 0x20>;
45 			reg-shift = <2>;
46 			reg-io-width = <4>;
47 			clock-frequency = <32000000>;
48 			interrupt-parent = <&pic>;
52 			compatible = "opencores,i2c-ocores";
53 			#address-cells = <1>;
54 			#size-cells = <0>;
55 			reg = <0 0x37120 0x20>;
56 			reg-shift = <2>;
57 			reg-io-width = <4>;
58 			clock-frequency = <32000000>;
59 			interrupt-parent = <&pic>;
64 				reg = <0x68>;
69 				reg = <0x4c>;
73 			compatible = "netlogic,xlp-pic";
74 			#address-cells = <0>;
75 			#interrupt-cells = <1>;
76 			reg = <0 0x4000 0x200>;
77 			interrupt-controller;
81 			compatible = "cfi-flash";
82 			#address-cells = <1>;
83 			#size-cells = <1>;
84 			bank-width = <2>;
85 			reg = <1 0 0x1000000>;
88 				label = "x-loader";
89 				reg = <0x0 0x100000>; /* 1M */
90 				read-only;
94 				label = "u-boot";
95 				reg = <0x100000 0x100000>; /* 1M */
100 				reg = <0x200000 0x500000>; /* 5M */
105 				reg = <0x700000 0x800000>; /* 8M */
110 				reg = <0xf00000 0x100000>; /* 1M */
111 				read-only;
116 			compatible = "netlogic,xlp208-gpio";
117 			reg = <0 0x34100 0x1000>;
118 			#gpio-cells = <2>;
119 			gpio-controller;
121 			#interrupt-cells = <2>;
122 			interrupt-parent = <&pic>;
124 			interrupt-controller;