dts/mscc/ocelot_pcb120.dts

1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 /dts-v1/;
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/phy/phy-ocelot-serdes.h>
12 	compatible = "mscc,ocelot-pcb120", "mscc,ocelot";
15 		stdout-path = "serial0:115200n8";
42 	pinctrl-names = "default";
43 	pinctrl-0 = <&miim1>, <&phy_int_pins>, <&phy_load_save_pins>;
45 	phy7: ethernet-phy@0 {
48 		interrupt-parent = <&gpio>;
49 		load-save-gpios = <&gpio 10 GPIO_ACTIVE_HIGH>;
51 	phy6: ethernet-phy@1 {
54 		interrupt-parent = <&gpio>;
55 		load-save-gpios = <&gpio 10 GPIO_ACTIVE_HIGH>;
57 	phy5: ethernet-phy@2 {
60 		interrupt-parent = <&gpio>;
61 		load-save-gpios = <&gpio 10 GPIO_ACTIVE_HIGH>;
63 	phy4: ethernet-phy@3 {
66 		interrupt-parent = <&gpio>;
67 		load-save-gpios = <&gpio 10 GPIO_ACTIVE_HIGH>;
72 	phy-handle = <&phy0>;
76 	phy-handle = <&phy1>;
80 	phy-handle = <&phy2>;
84 	phy-handle = <&phy3>;
88 	phy-handle = <&phy7>;
89 	phy-mode = "sgmii";
94 	phy-handle = <&phy4>;
95 	phy-mode = "sgmii";
100 	phy-handle = <&phy6>;
101 	phy-mode = "sgmii";
106 	phy-handle = <&phy5>;
107 	phy-mode = "sgmii";