dts/brcm/bcm3368.dtsi

1 // SPDX-License-Identifier: GPL-2.0
3 	#address-cells = <1>;
4 	#size-cells = <1>;
8 		#address-cells = <1>;
9 		#size-cells = <0>;
11 		mips-hpt-frequency = <150000000>;
27 		periph_clk: periph-clk {
28 			compatible = "fixed-clock";
29 			#clock-cells = <0>;
30 			clock-frequency = <50000000>;
39 	cpu_intc: interrupt-controller {
40 		#address-cells = <0>;
41 		compatible = "mti,cpu-interrupt-controller";
43 		interrupt-controller;
44 		#interrupt-cells = <1>;
48 		#address-cells = <1>;
49 		#size-cells = <1>;
51 		compatible = "simple-bus";
54 		clkctl: clock-controller@fff8c004 {
55 			compatible = "brcm,bcm3368-clocks";
57 			#clock-cells = <1>;
63 			native-endian;
66 		reboot: syscon-reboot@fff8c008 {  label
67 			compatible = "syscon-reboot";
69 			offset = <0x0>;
73 		periph_intc: interrupt-controller@fff8c00c {
74 			compatible = "brcm,bcm6345-l1-intc";
77 			interrupt-controller;
78 			#interrupt-cells = <1>;
80 			interrupt-parent = <&cpu_intc>;
85 			compatible = "brcm,bcm6345-uart";
88 			interrupt-parent = <&periph_intc>;
92 			clock-names = "refclk";
98 			compatible = "brcm,bcm6345-uart";
101 			interrupt-parent = <&periph_intc>;
105 			clock-names = "refclk";