ia64/kernel/mca.c

349 #define IA64_MAX_LOG_TYPES      4   /* MCA, INIT, CMC, CPE */
391  * Inputs   :   info_type   (SAL_INFO_TYPE_{MCA,INIT,CMC,CPE})
417  *  Inputs  :   info_type   (SAL_INFO_TYPE_{MCA,INIT,CMC,CPE})
458  *  Inputs  :   sal_info_type   (Type of error record MCA/CMC/CPE)
469 	static const char * const rec_name[] = { "MCA", "INIT", "CMC", "CPE" };  in ia64_mca_log_sal_error_record()
708  * disable the cmc interrupt vector.
720  * enable the cmc interrupt vector.
1416 		IA64_MCA_DEBUG(KERN_INFO "CMC threshold %d/%d\n", count, CMC_HISTORY_LENGTH);  in ia64_mca_cmc_int_handler()
1421 			/* If we're being hit with CMC interrupts, we won't  in ia64_mca_cmc_int_handler()
1423 			 * disable CMC interrupts on this processor now.  in ia64_mca_cmc_int_handler()
1433 			printk(KERN_WARNING "WARNING: Switching to polling CMC handler; error records may be lost\n");  in ia64_mca_cmc_int_handler()
1447 	/* Get the CMC error record and log it */  in ia64_mca_cmc_int_handler()
1458  * 	Triggered by sw interrupt from CMC polling routine.  Calls
1490 			printk(KERN_WARNING "Returning to interrupt driven CMC handler\n");  in ia64_mca_cmc_int_caller()
1517 	/* Trigger a CMC interrupt cascade  */  in ia64_mca_cmc_poll()
1879  *  4. Initialize MCA/CMC/INIT related log buffers maintained by the OS.
2004 	 * platform/processor error states for MCA/INIT/CMC  in ia64_mca_init()
2021  * processors have been brought online and have set their own CMC vectors to
2027 	 *  Configure the CMCI/P vector and handler. Interrupts for CMC are  in ia64_mca_irq_init()
2028 	 *  per-processor, so AP CMC interrupts are setup in smp_callin() (smpboot.c).  in ia64_mca_irq_init()