Lines Matching +full:8 +full:v
40 #define IA64_FETCHADD(tmp,v,n,sz,sem) \ argument
44 tmp = ia64_fetchadd4_##sem((unsigned int *) v, n); \
47 case 8: \
48 tmp = ia64_fetchadd8_##sem((unsigned long *) v, n); \
56 #define ia64_fetchadd(i,v,sem) \ argument
59 volatile __typeof__(*(v)) *_v = (v); \
62 IA64_FETCHADD(_tmp, _v, -16, sizeof(*(v)), sem); \
63 else if ((i) == -8) \
64 IA64_FETCHADD(_tmp, _v, -8, sizeof(*(v)), sem); \
66 IA64_FETCHADD(_tmp, _v, -4, sizeof(*(v)), sem); \
68 IA64_FETCHADD(_tmp, _v, -1, sizeof(*(v)), sem); \
70 IA64_FETCHADD(_tmp, _v, 1, sizeof(*(v)), sem); \
72 IA64_FETCHADD(_tmp, _v, 4, sizeof(*(v)), sem); \
73 else if ((i) == 8) \
74 IA64_FETCHADD(_tmp, _v, 8, sizeof(*(v)), sem); \
76 IA64_FETCHADD(_tmp, _v, 16, sizeof(*(v)), sem); \
79 (__typeof__(*(v))) (_tmp); /* return old value */ \
82 #define ia64_fetch_and_add(i,v) (ia64_fetchadd(i, v, rel) + (i)) /* return new value */ argument