Lines Matching full:processor
6 * Processor Abstraction Layer definitions.
9 * chapter 11 IA-64 Processor Abstraction Layer
21 * 00/03/23 cfleck Modified processor min-state save area to match updated PAL & SAL info
42 #define PAL_BUS_GET_FEATURES 9 /* return processor bus interface features settings */
43 #define PAL_BUS_SET_FEATURES 10 /* set processor bus features */
47 #define PAL_FREQ_RATIOS 14 /* ratio of processor, bus and ITC frequency */
49 #define PAL_PLATFORM_ADDR 16 /* set processor interrupt block and IO port space addr */
50 #define PAL_PROC_GET_FEATURES 17 /* get configurable processor features & settings */
51 #define PAL_PROC_SET_FEATURES 18 /* enable/disable configurable processor features */
54 #define PAL_MC_CLEAR_LOG 21 /* clear all processor log info */
57 #define PAL_MC_DYNAMIC_STATE 24 /* get processor dynamic state */
58 #define PAL_MC_ERROR_INFO 25 /* get processor MCA info and static state */
65 #define PAL_PMI_ENTRYPOINT 32 /* register PMI memory entry points with the processor */
69 #define PAL_MEM_FOR_TEST 37 /* get amount of memory needed for late processor test */
72 #define PAL_SHUTDOWN 40 /* enter processor shutdown state */
73 #define PAL_PREFETCH_VISIBILITY 41 /* Make Processor Prefetches Visible */
74 #define PAL_LOGICAL_TO_PHYSICAL 42 /* returns information on logical to physical processor mapping …
75 #define PAL_CACHE_SHARED_INFO 43 /* returns information on caches shared by logical processor */
78 #define PAL_VP_INFO 50 /* Information about virtual processor features */
82 #define PAL_HALT_INFO 257 /* return the low power capabilities of processor */
83 #define PAL_TEST_PROC 258 /* perform late processor self-test */
89 #define PAL_BRAND_INFO 274 /* Processor branding information */
96 #define PAL_MC_ERROR_INJECT 276 /* Injects processor error or returns injection capabilities */
122 /* Processor cache level in the hierarchy */
129 /* Processor cache type at a particular level in the hierarchy */
140 /* Processor cache line size in bytes */
143 /* Processor cache line state */
226 /* Processor cache protection information */
256 /* Processor cache part encodings */
274 /* Processor cache protection method encodings */
281 /* Processor cache line identification in the hierarchy */
339 /* Processor cache line part encodings */
369 #define PAL_MC_INFO_PROCESSOR 0 /* Processor */
384 rz : 1, /* PAL_CHECK processor
417 * processor to run in
436 dy : 1, /* Processor dynamic
473 * by the processor
880 /* Provide information about configurable processor bus features */
897 /* Enables/disables specific processor bus features */
945 * Flush the processor instruction or data caches. *PROGRESS must be
960 /* Initialize the processor controlled caches */
970 * processor controlled cache to known values without the availability
982 /* Read the data and tag of a processor controlled cache line for diags */
992 /* Return summary information about the hierarchy of caches controlled by the processor */
1005 /* Write the data and tag of a processor-controlled cache line for diags */
1032 ia64_pal_copy_pal (u64 target_addr, u64 alloc_size, u64 processor, u64 *pal_proc_offset) in ia64_pal_copy_pal() argument
1035 PAL_CALL(iprv, PAL_COPY_PAL, target_addr, alloc_size, processor); in ia64_pal_copy_pal()
1066 /* Get unique geographical address of this processor on its bus */
1077 /* Get base frequency of the platform if generated by the processor */
1088 * Get the ratios for processor frequency, bus frequency and interval timer to
1107 * Get the current hardware resource sharing policy of the processor
1124 /* Make the processor enter HALT or one of the implementation dependent low
1148 /* Return information about processor's optional power management capabilities. */
1176 /* Processor branding information*/
1185 /* Cause the processor to enter LIGHT HALT state, where prefetching and execution are
1196 /* Clear all the processor error logging registers and reset the indicator that allows
1210 /* Ensure that all outstanding transactions in a processor are completed or that any
1221 /* Return the machine check dynamic processor state */
1232 /* Return processor machine check information */
1245 /* Injects the requested processor error or returns info on
1246 * supported injection capabilities for current processor implementation
1314 * minimal processor state in the event of a machine check or initialization
1327 /* Restore minimal architectural processor state, set CMC interrupt if necessary
1338 /* Return the memory attributes implemented by the processor */
1349 /* Return the amount of memory needed for second phase of processor
1388 /* Specifies the physical address of the processor interrupt block
1409 /* Provide information about configurable processor features */
1426 /* Enable/disable processor dependent features */
1489 /* Return information about the register stack and RSE for this processor
1505 * Set the current hardware resource sharing policy of the processor
1515 /* Cause the processor to enter SHUTDOWN state, where prefetching and execution are
1527 /* Perform the second phase of processor self-test. */
1593 /* Return information about the virtual memory characteristics of the processor
1608 /* Get page size information about the virtual memory characteristics of the processor
1649 /* Get summary information about the virtual memory characteristics of the processor
1673 * Returns information about virtual processor features
1739 cpp :8, /* Cores per processor */
1741 ppid :8, /* Physical processor ID */
1780 /* Get information on logical to physical processor mappings. */
1805 /* Get information on logical to physical processor mappings. */