191 		ret = extract_bytes(READ_ONCE(irq->mpidr), addr & 7, len);  in vgic_mmio_read_irouter()
217 	irq->mpidr = val & GENMASK(23, 0);  in vgic_mmio_write_irouter()
218 	irq->target_vcpu = kvm_mpidr_to_vcpu(vcpu->kvm, irq->mpidr);  in vgic_mmio_write_irouter()
257 	unsigned long mpidr = kvm_vcpu_get_mpidr_aff(vcpu);  in vgic_mmio_read_v3r_typer()  local
265 	value = (u64)(mpidr & GENMASK(23, 0)) << 32;  in vgic_mmio_read_v3r_typer()
279 	unsigned long mpidr = kvm_vcpu_get_mpidr_aff(vcpu);  in vgic_uaccess_read_v3r_typer()  local
283 	value = (u64)(mpidr & GENMASK(23, 0)) << 32;  in vgic_uaccess_read_v3r_typer()
921  * If the VCPU's MPIDR matches, return the level0 affinity, otherwise
930 	 * Split the current VCPU's MPIDR into affinity level 0 and the  in match_mpidr()
949  * The ICC_SGI* registers encode the affinity differently from the MPIDR,
976 	u64 mpidr;  in vgic_v3_dispatch_sgi()  local
985 	mpidr = SGI_AFFINITY_LEVEL(reg, 3);  in vgic_v3_dispatch_sgi()
986 	mpidr |= SGI_AFFINITY_LEVEL(reg, 2);  in vgic_v3_dispatch_sgi()
987 	mpidr |= SGI_AFFINITY_LEVEL(reg, 1);  in vgic_v3_dispatch_sgi()
1009 			level0 = match_mpidr(mpidr, target_cpus, c_vcpu);  in vgic_v3_dispatch_sgi()