Lines Matching +full:non +full:- +full:live
1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
25 * Signal context structure - contains all info to do with the state
53 * New records that can exceed this space need to be opt-in for userspace, so
63 * and be 16-byte aligned. The last structure must be a dummy one with the
81 * Note: similarly to all other integer fields, each V-register is stored in an
82 * endianness-dependent format, with the byte at offset i from the start of the
83 * in-memory representation of the register value containing
85 * bits [(7 + 8 * i) : (8 * i)] of the register on little-endian hosts; or
86 * bits [(127 - 8 * i) : (120 - 8 * i)] on big-endian hosts.
115 * 16-byte aligned address immediately after the terminating null
127 __u64 datap; /* 16-byte aligned pointer to extra space cast to __u64 */
168 * If the SVE registers are currently live for the thread at signal delivery,
175 * the SVE registers were not live for the thread and no register data
181 * make the SVE registers live when they were previously non-live or
182 * vice-versa. This may require the caller to allocate fresh
204 * - ---- -----------
207 * ZREGS __uint128_t[SVE_NUM_ZREGS][vq] all Z-registers
208 * ZREG __uint128_t[vq] individual Z-register Zn
210 * PREGS uint16_t[SVE_NUM_PREGS][vq] all P-registers
211 * PREG uint16_t[vq] individual P-register Pn
213 * FFR uint16_t[vq] first-fault status register
217 * Unlike vregs[] in fpsimd_context, each SVE scalable register (Z-, P- or FFR)
218 * is encoded in memory in an endianness-invariant format, with the byte at
219 * offset i from the start of the in-memory representation containing bits
228 ((sizeof(struct sve_context) + (__SVE_VQ_BYTES - 1)) \