include/asm/ptrace.h

33 #define GIC_PRIO_IRQON			0xe0
34 #define __GIC_PRIO_IRQOFF		(GIC_PRIO_IRQON & ~0x80)
35 #define __GIC_PRIO_IRQOFF_NS		0xa0
50 #define PSR_MODE_THREAD_BIT	(1 << 0)
64 #define PSR_AA32_MODE_MASK	0x0000001f
65 #define PSR_AA32_MODE_USR	0x00000010
66 #define PSR_AA32_MODE_FIQ	0x00000011
67 #define PSR_AA32_MODE_IRQ	0x00000012
68 #define PSR_AA32_MODE_SVC	0x00000013
69 #define PSR_AA32_MODE_ABT	0x00000017
70 #define PSR_AA32_MODE_HYP	0x0000001a
71 #define PSR_AA32_MODE_UND	0x0000001b
72 #define PSR_AA32_MODE_SYS	0x0000001f
73 #define PSR_AA32_T_BIT		0x00000020
74 #define PSR_AA32_F_BIT		0x00000040
75 #define PSR_AA32_I_BIT		0x00000080
76 #define PSR_AA32_A_BIT		0x00000100
77 #define PSR_AA32_E_BIT		0x00000200
78 #define PSR_AA32_PAN_BIT	0x00400000
79 #define PSR_AA32_SSBS_BIT	0x00800000
80 #define PSR_AA32_DIT_BIT	0x01000000
81 #define PSR_AA32_Q_BIT		0x08000000
82 #define PSR_AA32_V_BIT		0x10000000
83 #define PSR_AA32_C_BIT		0x20000000
84 #define PSR_AA32_Z_BIT		0x40000000
85 #define PSR_AA32_N_BIT		0x80000000
86 #define PSR_AA32_IT_MASK	0x0600fc00	/* If-Then execution state mask */
87 #define PSR_AA32_GE_MASK	0x000f0000
92 #define PSR_AA32_ENDSTATE	0
96 #define COMPAT_PSR_DIT_BIT	0x00200000
102 #define COMPAT_PT_TEXT_ADDR		0x10000
103 #define COMPAT_PT_DATA_ADDR		0x10004
104 #define COMPAT_PT_TEXT_END_ADDR		0x10008
220 #define compat_thumb_mode(regs) (0)
262  * If @offset is bigger than MAX_REG_OFFSET, this returns 0.
266 	u64 val = 0;  in regs_get_register()
272 	case 0 ... 30:  in regs_get_register()
285 		val = 0;  in regs_get_register()
297 	return (r == 31) ? 0 : regs->regs[r];  in pt_regs_read_reg()
319 	return regs->regs[0];  in regs_return_value()
324 	regs->regs[0] = rc;  in regs_set_return_value()
330  * @n:		function argument number (start from 0)
346 	return 0;  in regs_get_kernel_argument()