Lines Matching +full:0 +full:- +full:4
1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/agilex-clock.h>
12 compatible = "intel,socfpga-agilex";
13 #address-cells = <2>;
14 #size-cells = <2>;
16 reserved-memory {
17 #address-cells = <2>;
18 #size-cells = <2>;
21 service_reserved: svcbuffer@0 {
22 compatible = "shared-dma-pool";
23 reg = <0x0 0x0 0x0 0x2000000>;
24 alignment = <0x1000>;
25 no-map;
30 #address-cells = <1>;
31 #size-cells = <0>;
33 cpu0: cpu@0 {
34 compatible = "arm,cortex-a53";
36 enable-method = "psci";
37 reg = <0x0>;
41 compatible = "arm,cortex-a53";
43 enable-method = "psci";
44 reg = <0x1>;
48 compatible = "arm,cortex-a53";
50 enable-method = "psci";
51 reg = <0x2>;
55 compatible = "arm,cortex-a53";
57 enable-method = "psci";
58 reg = <0x3>;
63 compatible = "arm,armv8-pmuv3";
64 interrupts = <0 170 4>,
65 <0 171 4>,
66 <0 172 4>,
67 <0 173 4>;
68 interrupt-affinity = <&cpu0>,
72 interrupt-parent = <&intc>;
76 compatible = "arm,psci-0.2";
81 compatible = "arm,gic-400", "arm,cortex-a15-gic";
82 #interrupt-cells = <3>;
83 interrupt-controller;
84 reg = <0x0 0xfffc1000 0x0 0x1000>,
85 <0x0 0xfffc2000 0x0 0x2000>,
86 <0x0 0xfffc4000 0x0 0x2000>,
87 <0x0 0xfffc6000 0x0 0x2000>;
91 #address-cells = <1>;
92 #size-cells = <1>;
93 compatible = "simple-bus";
95 interrupt-parent = <&intc>;
96 ranges = <0 0 0 0xffffffff>;
99 #address-cells = <0x1>;
100 #size-cells = <0x1>;
101 compatible = "fpga-region";
102 fpga-mgr = <&fpga_mgr>;
105 clkmgr: clock-controller@ffd10000 {
106 compatible = "intel,agilex-clkmgr";
107 reg = <0xffd10000 0x1000>;
108 #clock-cells = <1>;
112 cb_intosc_hs_div2_clk: cb-intosc-hs-div2-clk {
113 #clock-cells = <0>;
114 compatible = "fixed-clock";
117 cb_intosc_ls_clk: cb-intosc-ls-clk {
118 #clock-cells = <0>;
119 compatible = "fixed-clock";
122 f2s_free_clk: f2s-free-clk {
123 #clock-cells = <0>;
124 compatible = "fixed-clock";
128 #clock-cells = <0>;
129 compatible = "fixed-clock";
132 qspi_clk: qspi-clk {
133 #clock-cells = <0>;
134 compatible = "fixed-clock";
135 clock-frequency = <200000000>;
140 compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac";
141 reg = <0xff800000 0x2000>;
142 interrupts = <0 90 4>;
143 interrupt-names = "macirq";
144 mac-address = [00 00 00 00 00 00];
146 reset-names = "stmmaceth", "stmmaceth-ocp";
147 tx-fifo-depth = <16384>;
148 rx-fifo-depth = <16384>;
149 snps,multicast-filter-bins = <256>;
151 altr,sysmgr-syscon = <&sysmgr 0x44 0>;
153 clock-names = "stmmaceth", "ptp_ref";
158 compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac";
159 reg = <0xff802000 0x2000>;
160 interrupts = <0 91 4>;
161 interrupt-names = "macirq";
162 mac-address = [00 00 00 00 00 00];
164 reset-names = "stmmaceth", "stmmaceth-ocp";
165 tx-fifo-depth = <16384>;
166 rx-fifo-depth = <16384>;
167 snps,multicast-filter-bins = <256>;
169 altr,sysmgr-syscon = <&sysmgr 0x48 8>;
171 clock-names = "stmmaceth", "ptp_ref";
176 compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac";
177 reg = <0xff804000 0x2000>;
178 interrupts = <0 92 4>;
179 interrupt-names = "macirq";
180 mac-address = [00 00 00 00 00 00];
182 reset-names = "stmmaceth", "stmmaceth-ocp";
183 tx-fifo-depth = <16384>;
184 rx-fifo-depth = <16384>;
185 snps,multicast-filter-bins = <256>;
187 altr,sysmgr-syscon = <&sysmgr 0x4c 16>;
189 clock-names = "stmmaceth", "ptp_ref";
194 #address-cells = <1>;
195 #size-cells = <0>;
196 compatible = "snps,dw-apb-gpio";
197 reg = <0xffc03200 0x100>;
201 porta: gpio-controller@0 {
202 compatible = "snps,dw-apb-gpio-port";
203 gpio-controller;
204 #gpio-cells = <2>;
205 snps,nr-gpios = <24>;
206 reg = <0>;
207 interrupt-controller;
208 #interrupt-cells = <2>;
209 interrupts = <0 110 4>;
214 #address-cells = <1>;
215 #size-cells = <0>;
216 compatible = "snps,dw-apb-gpio";
217 reg = <0xffc03300 0x100>;
221 portb: gpio-controller@0 {
222 compatible = "snps,dw-apb-gpio-port";
223 gpio-controller;
224 #gpio-cells = <2>;
225 snps,nr-gpios = <24>;
226 reg = <0>;
227 interrupt-controller;
228 #interrupt-cells = <2>;
229 interrupts = <0 111 4>;
234 #address-cells = <1>;
235 #size-cells = <0>;
236 compatible = "snps,designware-i2c";
237 reg = <0xffc02800 0x100>;
238 interrupts = <0 103 4>;
245 #address-cells = <1>;
246 #size-cells = <0>;
247 compatible = "snps,designware-i2c";
248 reg = <0xffc02900 0x100>;
249 interrupts = <0 104 4>;
256 #address-cells = <1>;
257 #size-cells = <0>;
258 compatible = "snps,designware-i2c";
259 reg = <0xffc02a00 0x100>;
260 interrupts = <0 105 4>;
267 #address-cells = <1>;
268 #size-cells = <0>;
269 compatible = "snps,designware-i2c";
270 reg = <0xffc02b00 0x100>;
271 interrupts = <0 106 4>;
278 #address-cells = <1>;
279 #size-cells = <0>;
280 compatible = "snps,designware-i2c";
281 reg = <0xffc02c00 0x100>;
282 interrupts = <0 107 4>;
289 #address-cells = <1>;
290 #size-cells = <0>;
291 compatible = "altr,socfpga-dw-mshc";
292 reg = <0xff808000 0x1000>;
293 interrupts = <0 96 4>;
294 fifo-depth = <0x400>;
296 reset-names = "reset";
299 clock-names = "biu", "ciu";
305 #address-cells = <1>;
306 #size-cells = <0>;
307 compatible = "altr,socfpga-denali-nand";
308 reg = <0xffb90000 0x10000>,
309 <0xffb80000 0x1000>;
310 reg-names = "nand_data", "denali_reg";
311 interrupts = <0 97 4>;
315 clock-names = "nand", "nand_x", "ecc";
321 compatible = "mmio-sram";
322 reg = <0xffe00000 0x40000>;
327 reg = <0xffda0000 0x1000>;
328 interrupts = <0 81 4>,
329 <0 82 4>,
330 <0 83 4>,
331 <0 84 4>,
332 <0 85 4>,
333 <0 86 4>,
334 <0 87 4>,
335 <0 88 4>,
336 <0 89 4>;
337 #dma-cells = <1>;
338 #dma-channels = <8>;
339 #dma-requests = <32>;
341 reset-names = "dma", "dma-ocp";
343 clock-names = "apb_pclk";
347 #reset-cells = <1>;
348 compatible = "altr,stratix10-rst-mgr";
349 reg = <0xffd11000 0x100>;
353 compatible = "arm,mmu-500", "arm,smmu-v2";
354 reg = <0xfa000000 0x40000>;
355 #global-interrupts = <2>;
356 #iommu-cells = <1>;
357 interrupt-parent = <&intc>;
358 interrupts = <0 128 4>, /* Global Secure Fault */
359 <0 129 4>, /* Global Non-secure Fault */
360 /* Non-secure Context Interrupts (32) */
361 <0 138 4>, <0 139 4>, <0 140 4>, <0 141 4>,
362 <0 142 4>, <0 143 4>, <0 144 4>, <0 145 4>,
363 <0 146 4>, <0 147 4>, <0 148 4>, <0 149 4>,
364 <0 150 4>, <0 151 4>, <0 152 4>, <0 153 4>,
365 <0 154 4>, <0 155 4>, <0 156 4>, <0 157 4>,
366 <0 158 4>, <0 159 4>, <0 160 4>, <0 161 4>,
367 <0 162 4>, <0 163 4>, <0 164 4>, <0 165 4>,
368 <0 166 4>, <0 167 4>, <0 168 4>, <0 169 4>;
369 stream-match-mask = <0x7ff0>;
377 compatible = "snps,dw-apb-ssi";
378 #address-cells = <1>;
379 #size-cells = <0>;
380 reg = <0xffda4000 0x1000>;
381 interrupts = <0 99 4>;
383 reset-names = "spi";
384 reg-io-width = <4>;
385 num-cs = <4>;
391 compatible = "snps,dw-apb-ssi";
392 #address-cells = <1>;
393 #size-cells = <0>;
394 reg = <0xffda5000 0x1000>;
395 interrupts = <0 100 4>;
397 reset-names = "spi";
398 reg-io-width = <4>;
399 num-cs = <4>;
405 compatible = "altr,sys-mgr-s10","altr,sys-mgr";
406 reg = <0xffd12000 0x500>;
411 compatible = "arm,armv8-timer";
412 interrupts = <1 13 0xf08>,
413 <1 14 0xf08>,
414 <1 11 0xf08>,
415 <1 10 0xf08>;
419 compatible = "snps,dw-apb-timer";
420 interrupts = <0 113 4>;
421 reg = <0xffc03000 0x100>;
423 clock-names = "timer";
427 compatible = "snps,dw-apb-timer";
428 interrupts = <0 114 4>;
429 reg = <0xffc03100 0x100>;
431 clock-names = "timer";
435 compatible = "snps,dw-apb-timer";
436 interrupts = <0 115 4>;
437 reg = <0xffd00000 0x100>;
439 clock-names = "timer";
443 compatible = "snps,dw-apb-timer";
444 interrupts = <0 116 4>;
445 reg = <0xffd00100 0x100>;
447 clock-names = "timer";
451 compatible = "snps,dw-apb-uart";
452 reg = <0xffc02000 0x100>;
453 interrupts = <0 108 4>;
454 reg-shift = <2>;
455 reg-io-width = <4>;
462 compatible = "snps,dw-apb-uart";
463 reg = <0xffc02100 0x100>;
464 interrupts = <0 109 4>;
465 reg-shift = <2>;
466 reg-io-width = <4>;
472 usbphy0: usbphy@0 {
473 #phy-cells = <0>;
474 compatible = "usb-nop-xceiv";
480 reg = <0xffb00000 0x40000>;
481 interrupts = <0 93 4>;
483 phy-names = "usb2-phy";
485 reset-names = "dwc2", "dwc2-ecc";
493 reg = <0xffb40000 0x40000>;
494 interrupts = <0 94 4>;
496 phy-names = "usb2-phy";
498 reset-names = "dwc2", "dwc2-ecc";
505 compatible = "snps,dw-wdt";
506 reg = <0xffd00200 0x100>;
507 interrupts = <0 117 4>;
514 compatible = "snps,dw-wdt";
515 reg = <0xffd00300 0x100>;
516 interrupts = <0 118 4>;
523 compatible = "snps,dw-wdt";
524 reg = <0xffd00400 0x100>;
525 interrupts = <0 125 4>;
532 compatible = "snps,dw-wdt";
533 reg = <0xffd00500 0x100>;
534 interrupts = <0 126 4>;
541 compatible = "altr,sdr-ctl", "syscon";
542 reg = <0xf8011100 0xc0>;
546 compatible = "altr,socfpga-s10-ecc-manager",
547 "altr,socfpga-a10-ecc-manager";
548 altr,sysmgr-syscon = <&sysmgr>;
549 #address-cells = <1>;
550 #size-cells = <1>;
551 interrupts = <0 15 4>;
552 interrupt-controller;
553 #interrupt-cells = <2>;
557 compatible = "altr,sdram-edac-s10";
558 altr,sdr-syscon = <&sdr>;
559 interrupts = <16 4>;
562 ocram-ecc@ff8cc000 {
563 compatible = "altr,socfpga-s10-ocram-ecc",
564 "altr,socfpga-a10-ocram-ecc";
565 reg = <0xff8cc000 0x100>;
566 altr,ecc-parent = <&ocram>;
567 interrupts = <1 4>;
570 usb0-ecc@ff8c4000 {
571 compatible = "altr,socfpga-s10-usb-ecc",
572 "altr,socfpga-usb-ecc";
573 reg = <0xff8c4000 0x100>;
574 altr,ecc-parent = <&usb0>;
575 interrupts = <2 4>;
578 emac0-rx-ecc@ff8c0000 {
579 compatible = "altr,socfpga-s10-eth-mac-ecc",
580 "altr,socfpga-eth-mac-ecc";
581 reg = <0xff8c0000 0x100>;
582 altr,ecc-parent = <&gmac0>;
583 interrupts = <4 4>;
586 emac0-tx-ecc@ff8c0400 {
587 compatible = "altr,socfpga-s10-eth-mac-ecc",
588 "altr,socfpga-eth-mac-ecc";
589 reg = <0xff8c0400 0x100>;
590 altr,ecc-parent = <&gmac0>;
591 interrupts = <5 4>;
594 sdmmca-ecc@ff8c8c00 {
595 compatible = "altr,socfpga-s10-sdmmc-ecc",
596 "altr,socfpga-sdmmc-ecc";
597 reg = <0xff8c8c00 0x100>;
598 altr,ecc-parent = <&mmc>;
599 interrupts = <14 4>,
600 <15 4>;
605 compatible = "cdns,qspi-nor";
606 #address-cells = <1>;
607 #size-cells = <0>;
608 reg = <0xff8d2000 0x100>,
609 <0xff900000 0x100000>;
610 interrupts = <0 3 4>;
611 cdns,fifo-depth = <128>;
612 cdns,fifo-width = <4>;
613 cdns,trigger-address = <0x00000000>;
621 compatible = "intel,agilex-svc";
623 memory-region = <&service_reserved>;
625 fpga_mgr: fpga-mgr {
626 compatible = "intel,agilex-soc-fpga-mgr";