Lines Matching +full:cortex +full:- +full:a57

1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/clock/exynos7-clk.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 interrupt-parent = <&gic>;
15 #address-cells = <2>;
16 #size-cells = <2>;
31 arm-pmu {
32 compatible = "arm,cortex-a57-pmu";
37 interrupt-affinity = <&cpu_atlas0>, <&cpu_atlas1>,
43 compatible = "fixed-clock";
44 clock-output-names = "fin_pll";
45 #clock-cells = <0>;
49 #address-cells = <1>;
50 #size-cells = <0>;
54 compatible = "arm,cortex-a57";
56 enable-method = "psci";
61 compatible = "arm,cortex-a57";
63 enable-method = "psci";
68 compatible = "arm,cortex-a57";
70 enable-method = "psci";
75 compatible = "arm,cortex-a57";
77 enable-method = "psci";
82 compatible = "arm,psci-0.2";
87 compatible = "simple-bus";
88 #address-cells = <1>;
89 #size-cells = <1>;
93 compatible = "samsung,exynos4210-chipid";
97 gic: interrupt-controller@11001000 {
98 compatible = "arm,gic-400";
99 #interrupt-cells = <3>;
100 #address-cells = <0>;
101 interrupt-controller;
113 clock-names = "apb_pclk";
114 #dma-cells = <1>;
115 #dma-channels = <8>;
116 #dma-requests = <32>;
124 clock-names = "apb_pclk";
125 #dma-cells = <1>;
126 #dma-channels = <8>;
127 #dma-requests = <32>;
130 clock_topc: clock-controller@10570000 {
131 compatible = "samsung,exynos7-clock-topc";
133 #clock-cells = <1>;
136 clock_top0: clock-controller@105d0000 {
137 compatible = "samsung,exynos7-clock-top0";
139 #clock-cells = <1>;
144 clock-names = "fin_pll", "dout_sclk_bus0_pll",
149 clock_top1: clock-controller@105e0000 {
150 compatible = "samsung,exynos7-clock-top1";
152 #clock-cells = <1>;
157 clock-names = "fin_pll", "dout_sclk_bus0_pll",
162 clock_ccore: clock-controller@105b0000 {
163 compatible = "samsung,exynos7-clock-ccore";
165 #clock-cells = <1>;
167 clock-names = "fin_pll", "dout_aclk_ccore_133";
170 clock_peric0: clock-controller@13610000 {
171 compatible = "samsung,exynos7-clock-peric0";
173 #clock-cells = <1>;
176 clock-names = "fin_pll", "dout_aclk_peric0_66",
180 clock_peric1: clock-controller@14c80000 {
181 compatible = "samsung,exynos7-clock-peric1";
183 #clock-cells = <1>;
188 clock-names = "fin_pll", "dout_aclk_peric1_66",
192 clock_peris: clock-controller@10040000 {
193 compatible = "samsung,exynos7-clock-peris";
195 #clock-cells = <1>;
197 clock-names = "fin_pll", "dout_aclk_peris_66";
200 clock_fsys0: clock-controller@10e90000 {
201 compatible = "samsung,exynos7-clock-fsys0";
203 #clock-cells = <1>;
206 clock-names = "fin_pll", "dout_aclk_fsys0_200",
210 clock_fsys1: clock-controller@156e0000 {
211 compatible = "samsung,exynos7-clock-fsys1";
213 #clock-cells = <1>;
220 clock-names = "fin_pll", "dout_aclk_fsys1_200",
227 compatible = "samsung,exynos4210-uart";
232 clock-names = "uart", "clk_uart_baud0";
237 compatible = "samsung,exynos4210-uart";
242 clock-names = "uart", "clk_uart_baud0";
247 compatible = "samsung,exynos4210-uart";
252 clock-names = "uart", "clk_uart_baud0";
257 compatible = "samsung,exynos4210-uart";
262 clock-names = "uart", "clk_uart_baud0";
267 compatible = "samsung,exynos7-pinctrl";
270 wakeup-interrupt-controller {
271 compatible = "samsung,exynos7-wakeup-eint";
272 interrupt-parent = <&gic>;
278 compatible = "samsung,exynos7-pinctrl";
284 compatible = "samsung,exynos7-pinctrl";
290 compatible = "samsung,exynos7-pinctrl";
296 compatible = "samsung,exynos7-pinctrl";
302 compatible = "samsung,exynos7-pinctrl";
308 compatible = "samsung,exynos7-pinctrl";
314 compatible = "samsung,exynos7-pinctrl";
320 compatible = "samsung,exynos7-pinctrl";
326 compatible = "samsung,exynos7-hsi2c";
329 #address-cells = <1>;
330 #size-cells = <0>;
331 pinctrl-names = "default";
332 pinctrl-0 = <&hs_i2c0_bus>;
334 clock-names = "hsi2c";
339 compatible = "samsung,exynos7-hsi2c";
342 #address-cells = <1>;
343 #size-cells = <0>;
344 pinctrl-names = "default";
345 pinctrl-0 = <&hs_i2c1_bus>;
347 clock-names = "hsi2c";
352 compatible = "samsung,exynos7-hsi2c";
355 #address-cells = <1>;
356 #size-cells = <0>;
357 pinctrl-names = "default";
358 pinctrl-0 = <&hs_i2c2_bus>;
360 clock-names = "hsi2c";
365 compatible = "samsung,exynos7-hsi2c";
368 #address-cells = <1>;
369 #size-cells = <0>;
370 pinctrl-names = "default";
371 pinctrl-0 = <&hs_i2c3_bus>;
373 clock-names = "hsi2c";
378 compatible = "samsung,exynos7-hsi2c";
381 #address-cells = <1>;
382 #size-cells = <0>;
383 pinctrl-names = "default";
384 pinctrl-0 = <&hs_i2c4_bus>;
386 clock-names = "hsi2c";
391 compatible = "samsung,exynos7-hsi2c";
394 #address-cells = <1>;
395 #size-cells = <0>;
396 pinctrl-names = "default";
397 pinctrl-0 = <&hs_i2c5_bus>;
399 clock-names = "hsi2c";
404 compatible = "samsung,exynos7-hsi2c";
407 #address-cells = <1>;
408 #size-cells = <0>;
409 pinctrl-names = "default";
410 pinctrl-0 = <&hs_i2c6_bus>;
412 clock-names = "hsi2c";
417 compatible = "samsung,exynos7-hsi2c";
420 #address-cells = <1>;
421 #size-cells = <0>;
422 pinctrl-names = "default";
423 pinctrl-0 = <&hs_i2c7_bus>;
425 clock-names = "hsi2c";
430 compatible = "samsung,exynos7-hsi2c";
433 #address-cells = <1>;
434 #size-cells = <0>;
435 pinctrl-names = "default";
436 pinctrl-0 = <&hs_i2c8_bus>;
438 clock-names = "hsi2c";
443 compatible = "samsung,exynos7-hsi2c";
446 #address-cells = <1>;
447 #size-cells = <0>;
448 pinctrl-names = "default";
449 pinctrl-0 = <&hs_i2c9_bus>;
451 clock-names = "hsi2c";
456 compatible = "samsung,exynos7-hsi2c";
459 #address-cells = <1>;
460 #size-cells = <0>;
461 pinctrl-names = "default";
462 pinctrl-0 = <&hs_i2c10_bus>;
464 clock-names = "hsi2c";
469 compatible = "samsung,exynos7-hsi2c";
472 #address-cells = <1>;
473 #size-cells = <0>;
474 pinctrl-names = "default";
475 pinctrl-0 = <&hs_i2c11_bus>;
477 clock-names = "hsi2c";
481 pmu_system_controller: system-controller@105c0000 {
482 compatible = "samsung,exynos7-pmu", "syscon";
485 reboot: syscon-reboot {
486 compatible = "syscon-reboot";
494 compatible = "samsung,s3c6410-rtc";
499 clock-names = "rtc";
504 compatible = "samsung,exynos7-wdt";
508 clock-names = "watchdog";
509 samsung,syscon-phandle = <&pmu_system_controller>;
514 compatible = "samsung,exynos5433-mali", "arm,mali-t760";
519 interrupt-names = "job", "mmu", "gpu";
525 compatible = "samsung,exynos7-dw-mshc-smu";
527 #address-cells = <1>;
528 #size-cells = <0>;
532 clock-names = "biu", "ciu";
533 fifo-depth = <0x40>;
538 compatible = "samsung,exynos7-dw-mshc";
540 #address-cells = <1>;
541 #size-cells = <0>;
545 clock-names = "biu", "ciu";
546 fifo-depth = <0x40>;
551 compatible = "samsung,exynos7-dw-mshc-smu";
553 #address-cells = <1>;
554 #size-cells = <0>;
558 clock-names = "biu", "ciu";
559 fifo-depth = <0x40>;
564 compatible = "samsung,exynos7-adc";
568 clock-names = "adc";
569 #io-channel-cells = <1>;
570 io-channel-ranges;
575 compatible = "samsung,exynos4210-pwm";
582 samsung,pwm-outputs = <0>, <1>, <2>, <3>;
583 #pwm-cells = <3>;
585 clock-names = "timers";
589 compatible = "samsung,exynos7-tmu";
594 clock-names = "tmu_apbif", "tmu_sclk";
595 #thermal-sensor-cells = <0>;
599 compatible = "samsung,exynos7-ufs";
604 reg-names = "hci", "vs_hci", "unipro", "ufsp";
608 clock-names = "core_clk", "sclk_unipro_main";
609 freq-table-hz = <0 0>, <0 0>;
610 pinctrl-names = "default";
611 pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>;
613 phy-names = "ufs-phy";
617 ufs_phy: ufs-phy@15571800 {
618 compatible = "samsung,exynos7-ufs-phy";
620 reg-names = "phy-pma";
621 samsung,pmu-syscon = <&pmu_system_controller>;
622 #phy-cells = <0>;
627 clock-names = "ref_clk", "rx1_symbol_clk",
633 compatible = "samsung,exynos7-usbdrd-phy";
640 clock-names = "phy", "ref", "phy_pipe",
642 samsung,pmu-syscon = <&pmu_system_controller>;
643 #phy-cells = <1>;
647 compatible = "samsung,exynos7-dwusb3";
651 clock-names = "usbdrd30", "usbdrd30_susp_clk",
653 #address-cells = <1>;
654 #size-cells = <1>;
662 phy-names = "usb2-phy", "usb3-phy";
667 thermal-zones {
668 atlas_thermal: cluster0-thermal {
669 polling-delay-passive = <0>; /* milliseconds */
670 polling-delay = <0>; /* milliseconds */
671 thermal-sensors = <&tmuctrl_0>;
672 #include "exynos7-trip-points.dtsi"
677 compatible = "arm,armv8-timer";
689 #include "exynos7-pinctrl.dtsi"