Lines Matching +full:spin +full:- +full:table
1 // SPDX-License-Identifier: GPL-2.0
5 * Architecture Envelope Model (AEM) ARMv8-A
11 /dts-v1/;
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
17 #include "rtsm_ve-motherboard.dtsi"
22 interrupt-parent = <&gic>;
23 #address-cells = <2>;
24 #size-cells = <2>;
36 #address-cells = <2>;
37 #size-cells = <0>;
43 enable-method = "spin-table";
44 cpu-release-addr = <0x0 0x8000fff8>;
45 next-level-cache = <&L2_0>;
51 enable-method = "spin-table";
52 cpu-release-addr = <0x0 0x8000fff8>;
53 next-level-cache = <&L2_0>;
59 enable-method = "spin-table";
60 cpu-release-addr = <0x0 0x8000fff8>;
61 next-level-cache = <&L2_0>;
67 enable-method = "spin-table";
68 cpu-release-addr = <0x0 0x8000fff8>;
69 next-level-cache = <&L2_0>;
72 L2_0: l2-cache0 {
83 reserved-memory {
84 #address-cells = <2>;
85 #size-cells = <2>;
91 compatible = "shared-dma-pool";
93 no-map;
97 gic: interrupt-controller@2c001000 {
98 compatible = "arm,gic-400", "arm,cortex-a15-gic";
99 #interrupt-cells = <3>;
100 #address-cells = <0>;
101 interrupt-controller;
110 compatible = "arm,armv8-timer";
115 clock-frequency = <100000000>;
119 compatible = "arm,armv8-pmuv3";
127 compatible = "arm,rtsm-display";
130 remote-endpoint = <&clcd_pads>;
136 compatible = "simple-bus";
138 #address-cells = <2>;
139 #size-cells = <1>;
147 #interrupt-cells = <1>;
148 interrupt-map-mask = <0 0 63>;
149 interrupt-map = <0 0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,