Lines Matching full:clkc

8 #include <dt-bindings/clock/g12a-clkc.h>
29 			clocks = <&clkc CLKID_HDMI>,
30 				 <&clkc CLKID_HTX_PCLK>,
31 				 <&clkc CLKID_VPU_INTR>;
39 			clocks = <&clkc CLKID_HDMI>,
40 				 <&clkc CLKID_HTX_PCLK>,
41 				 <&clkc CLKID_VPU_INTR>;
48 		clocks = <&clkc CLKID_EFUSE>;
140 			clocks = <&clkc CLKID_PCIE_PHY
141 				  &clkc CLKID_PCIE_COMB
142 				  &clkc CLKID_PCIE_PLL>;
219 			clocks = <&clkc CLKID_ETH>,
220 				 <&clkc CLKID_FCLK_DIV2>,
221 				 <&clkc CLKID_MPLL2>,
222 				 <&clkc CLKID_FCLK_DIV2>;
253 				clocks = <&clkc CLKID_HDMI>,
254 					 <&clkc CLKID_HTX_PCLK>,
255 					 <&clkc CLKID_VPU_INTR>;
287 					clocks = <&clkc CLKID_RNG0>;
297 				clocks = <&clkc CLKID_AUDIO_CODEC>;
1576 				clocks = <&clkc CLKID_TS>;
1586 				clocks = <&clkc CLKID_TS>;
1636 					clkc: clock-controller {  label
1637 						compatible = "amlogic,g12a-clkc";
1661 						clocks = <&clkc CLKID_VPU>,
1662 							 <&clkc CLKID_VAPB>;
1670 						assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
1671 								  <&clkc CLKID_VPU_0>,
1672 								  <&clkc CLKID_VPU>, /* Glitch free mux */
1673 								  <&clkc CLKID_VAPB_0_SEL>,
1674 								  <&clkc CLKID_VAPB_0>,
1675 								  <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
1676 						assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
1678 									 <&clkc CLKID_VPU_0>,
1679 									 <&clkc CLKID_FCLK_DIV4>,
1681 									 <&clkc CLKID_VAPB_0>;
1695 				clocks = <&clkc CLKID_PCIE_PLL>;
1699 				assigned-clocks = <&clkc CLKID_PCIE_PLL>;
1707 				clocks = <&clkc CLKID_ETH_PHY>,
1709 					 <&clkc CLKID_MPLL_50M>;
1756 					clocks = <&xtal>, <&clkc CLKID_CLK81>;
2071 				clocks = <&clkc CLKID_I2C>;
2115 			clocks = <&clkc CLKID_PARSER>,
2116 				 <&clkc CLKID_DOS>,
2117 				 <&clkc CLKID_VDEC_1>,
2118 				 <&clkc CLKID_VDEC_HEVC>,
2119 				 <&clkc CLKID_VDEC_HEVCF>;
2190 				clocks = <&clkc CLKID_SPICC0>,
2191 					 <&clkc CLKID_SPICC0_SCLK>;
2202 				clocks = <&clkc CLKID_SPICC1>,
2203 					 <&clkc CLKID_SPICC1_SCLK>;
2216 				clocks = <&clkc CLKID_CLK81>;
2247 				clocks = <&clkc CLKID_I2C>;
2257 				clocks = <&clkc CLKID_I2C>;
2267 				clocks = <&clkc CLKID_I2C>;
2277 				clocks = <&clkc CLKID_I2C>;
2289 				clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
2298 				clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
2307 				clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
2318 			clocks = <&clkc CLKID_SD_EMMC_A>,
2319 				 <&clkc CLKID_SD_EMMC_A_CLK0>,
2320 				 <&clkc CLKID_FCLK_DIV2>;
2330 			clocks = <&clkc CLKID_SD_EMMC_B>,
2331 				 <&clkc CLKID_SD_EMMC_B_CLK0>,
2332 				 <&clkc CLKID_FCLK_DIV2>;
2342 			clocks = <&clkc CLKID_SD_EMMC_C>,
2343 				 <&clkc CLKID_SD_EMMC_C_CLK0>,
2344 				 <&clkc CLKID_FCLK_DIV2>;
2358 			clocks = <&clkc CLKID_USB>;
2371 				clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
2400 			clocks = <&clkc CLKID_MALI>;