Lines Matching +full:gic +full:- +full:v2m +full:- +full:frame
1 // SPDX-License-Identifier: GPL-2.0
10 interrupt-parent = <&gic0>;
11 #address-cells = <2>;
12 #size-cells = <2>;
14 gic0: interrupt-controller@e1101000 {
15 compatible = "arm,gic-400", "arm,cortex-a15-gic";
16 interrupt-controller;
17 #interrupt-cells = <3>;
18 #address-cells = <2>;
19 #size-cells = <2>;
26 v2m0: v2m@e0080000 {
27 compatible = "arm,gic-v2m-frame";
28 msi-controller;
34 compatible = "arm,armv8-timer";
42 compatible = "arm,armv8-pmuv3";
54 compatible = "simple-bus";
55 #address-cells = <2>;
56 #size-cells = <2>;
60 * dma-ranges is 40-bit address space containing:
61 * - GICv2m MSI register is at 0xe0080000
62 * - DRAM range [0x8000000000 to 0xffffffffff]
64 dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x0>;
66 /include/ "amd-seattle-clks.dtsi"
69 compatible = "snps,dwc-ahci";
73 dma-coherent;
79 compatible = "snps,dwc-ahci";
83 dma-coherent;
88 compatible = "snps,designware-i2c";
96 compatible = "snps,designware-i2c";
107 clock-names = "uartclk", "apb_pclk";
114 spi-controller;
117 clock-names = "apb_pclk";
124 spi-controller;
127 clock-names = "apb_pclk";
128 num-cs = <1>;
129 #address-cells = <1>;
130 #size-cells = <0>;
136 #gpio-cells = <2>;
138 gpio-controller;
140 interrupt-controller;
141 #interrupt-cells = <2>;
143 clock-names = "apb_pclk";
149 #gpio-cells = <2>;
151 gpio-controller;
152 interrupt-controller;
153 #interrupt-cells = <2>;
156 clock-names = "apb_pclk";
162 #gpio-cells = <2>;
164 gpio-controller;
165 interrupt-controller;
166 #interrupt-cells = <2>;
169 clock-names = "apb_pclk";
175 #gpio-cells = <2>;
177 gpio-controller;
178 interrupt-controller;
179 #interrupt-cells = <2>;
182 clock-names = "apb_pclk";
188 #gpio-cells = <2>;
190 gpio-controller;
191 interrupt-controller;
192 #interrupt-cells = <2>;
195 clock-names = "apb_pclk";
200 compatible = "amd,ccp-seattle-v1a";
203 dma-coherent;
207 compatible = "pci-host-ecam-generic";
208 #address-cells = <3>;
209 #size-cells = <2>;
210 #interrupt-cells = <1>;
212 bus-range = <0 0x7f>;
213 msi-parent = <&v2m0>;
216 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
217 interrupt-map =
223 dma-coherent;
224 dma-ranges = <0x43000000 0x0 0x0 0x0 0x0 0x100 0x0>;
228 /* 32-bit MMIO (size=2G) */
230 /* 64-bit MMIO (size= 124G) */
236 compatible = "arm,ccn-504";
243 compatible = "ipmi-kcs";
247 reg-size = <1>;
248 reg-spacing = <4>;