1 // SPDX-License-Identifier: GPL-2.0-only
58 	node = of_find_compatible_node(NULL, NULL, "qcom,gcc-msm8660");  in scss_release_secondary()
61 		return -ENXIO;  in scss_release_secondary()
67 		return -ENOMEM;  in scss_release_secondary()
81 	void __iomem *reg, *saw_reg;  in kpssv1_release_secondary()  local
87 		return -ENODEV;  in kpssv1_release_secondary()
91 		ret = -ENODEV;  in kpssv1_release_secondary()
97 		ret = -ENODEV;  in kpssv1_release_secondary()
101 	reg = of_iomap(acc_node, 0);  in kpssv1_release_secondary()
102 	if (!reg) {  in kpssv1_release_secondary()
103 		ret = -ENOMEM;  in kpssv1_release_secondary()
109 		ret = -ENOMEM;  in kpssv1_release_secondary()
118 	/* Krait bring-up sequence */  in kpssv1_release_secondary()
120 	writel_relaxed(val, reg + APCS_CPU_PWR_CTL);  in kpssv1_release_secondary()
122 	writel_relaxed(val, reg + APCS_CPU_PWR_CTL);  in kpssv1_release_secondary()
127 	writel_relaxed(val, reg + APCS_CPU_PWR_CTL);  in kpssv1_release_secondary()
132 	writel_relaxed(val, reg + APCS_CPU_PWR_CTL);  in kpssv1_release_secondary()
137 	writel_relaxed(val, reg + APCS_CPU_PWR_CTL);  in kpssv1_release_secondary()
142 	writel_relaxed(val, reg + APCS_CPU_PWR_CTL);  in kpssv1_release_secondary()
147 	iounmap(reg);  in kpssv1_release_secondary()
159 	void __iomem *reg;  in kpssv2_release_secondary()  local
167 		return -ENODEV;  in kpssv2_release_secondary()
171 		ret = -ENODEV;  in kpssv2_release_secondary()
175 	l2_node = of_parse_phandle(cpu_node, "next-level-cache", 0);  in kpssv2_release_secondary()
177 		ret = -ENODEV;  in kpssv2_release_secondary()
183 		ret = -ENODEV;  in kpssv2_release_secondary()
187 	reg = of_iomap(acc_node, 0);  in kpssv2_release_secondary()
188 	if (!reg) {  in kpssv2_release_secondary()
189 		ret = -ENOMEM;  in kpssv2_release_secondary()
195 		ret = -ENOMEM;  in kpssv2_release_secondary()
201 	writel_relaxed(reg_val, reg + APC_PWR_GATE_CTL);  in kpssv2_release_secondary()
208 	writel_relaxed(reg_val, reg + APC_PWR_GATE_CTL);  in kpssv2_release_secondary()
215 	writel_relaxed(reg_val, reg + APC_PWR_GATE_CTL);  in kpssv2_release_secondary()
223 	writel_relaxed(reg_val, reg + APCS_CPU_PWR_CTL);  in kpssv2_release_secondary()
228 	writel_relaxed(reg_val, reg + APCS_CPU_PWR_CTL);  in kpssv2_release_secondary()
233 	writel_relaxed(reg_val, reg + APCS_CPU_PWR_CTL);  in kpssv2_release_secondary()
237 	writel_relaxed(reg_val, reg + APCS_CPU_PWR_CTL);  in kpssv2_release_secondary()
244 	iounmap(reg);  in kpssv2_release_secondary()
270 	 * Send the secondary CPU a soft interrupt, thereby causing  in qcom_boot_secondary()
271 	 * the boot monitor to read the system wide flags register,  in qcom_boot_secondary()
305 		pr_warn("Failed to set CPU boot address, disabling SMP\n");  in qcom_smp_prepare_cpus()
316 CPU_METHOD_OF_DECLARE(qcom_smp, "qcom,gcc-msm8660", &smp_msm8660_ops);
325 CPU_METHOD_OF_DECLARE(qcom_smp_kpssv1, "qcom,kpss-acc-v1", &qcom_smp_kpssv1_ops);
334 CPU_METHOD_OF_DECLARE(qcom_smp_kpssv2, "qcom,kpss-acc-v2", &qcom_smp_kpssv2_ops);