Lines Matching full:24
24 #define OMAP4430_CLKSEL_SHIFT 24
26 #define OMAP4430_CLKSEL_MASK (1 << 24)
31 #define OMAP4430_CLKSEL_24_25_SHIFT 24
33 #define OMAP4430_CLKSEL_60M_SHIFT 24
35 #define OMAP4430_CLKSEL_AESS_FCLK_SHIFT 24
39 #define OMAP4430_CLKSEL_DIV_SHIFT 24
41 #define OMAP4430_CLKSEL_FCLK_SHIFT 24
53 #define OMAP4430_CLKSEL_PMD_TRACE_CLK_MASK (0x7 << 24)
54 #define OMAP4430_CLKSEL_SGX_FCLK_MASK (1 << 24)
55 #define OMAP4430_CLKSEL_SOURCE_MASK (0x3 << 24)
56 #define OMAP4430_CLKSEL_SOURCE_24_24_MASK (1 << 24)
57 #define OMAP4430_CLKSEL_UTMI_P1_SHIFT 24
80 #define OMAP4430_DPLL_SD_DIV_MASK (0xff << 24)