1 // SPDX-License-Identifier: GPL-2.0-only
5  * Based on arch/arm/mach-vexpress/platsmp.c, Copyright (C) 2002 ARM Ltd.
23 void hi3xxx_set_cpu_jump(int cpu, void *jump_addr)  in hi3xxx_set_cpu_jump()  argument
25 	cpu = cpu_logical_map(cpu);  in hi3xxx_set_cpu_jump()
26 	if (!cpu || !ctrl_base)  in hi3xxx_set_cpu_jump()
28 	writel_relaxed(__pa_symbol(jump_addr), ctrl_base + ((cpu - 1) << 2));  in hi3xxx_set_cpu_jump()
31 int hi3xxx_get_cpu_jump(int cpu)  in hi3xxx_get_cpu_jump()  argument
33 	cpu = cpu_logical_map(cpu);  in hi3xxx_get_cpu_jump()
34 	if (!cpu || !ctrl_base)  in hi3xxx_get_cpu_jump()
36 	return readl_relaxed(ctrl_base + ((cpu - 1) << 2));  in hi3xxx_get_cpu_jump()
59 	u32 offset = 0;  in hi3xxx_smp_prepare_cpus()  local
73 		if (of_property_read_u32(np, "smp-offset", &offset) < 0) {  in hi3xxx_smp_prepare_cpus()
74 			pr_err("failed to find smp-offset property\n");  in hi3xxx_smp_prepare_cpus()
77 		ctrl_base += offset;  in hi3xxx_smp_prepare_cpus()
81 static int hi3xxx_boot_secondary(unsigned int cpu, struct task_struct *idle)  in hi3xxx_boot_secondary()  argument
83 	hi3xxx_set_cpu(cpu, true);  in hi3xxx_boot_secondary()
84 	hi3xxx_set_cpu_jump(cpu, secondary_startup);  in hi3xxx_boot_secondary()
85 	arch_send_wakeup_ipi_mask(cpumask_of(cpu));  in hi3xxx_boot_secondary()
109 	writel_relaxed(0xe51ff004, virt);	/* ldr pc, [pc, #-4] */  in hix5hd2_set_scu_boot_addr()
114 static int hix5hd2_boot_secondary(unsigned int cpu, struct task_struct *idle)  in hix5hd2_boot_secondary()  argument
120 	hix5hd2_set_cpu(cpu, true);  in hix5hd2_boot_secondary()
121 	arch_send_wakeup_ipi_mask(cpumask_of(cpu));  in hix5hd2_boot_secondary()
149 static int hip01_boot_secondary(unsigned int cpu, struct task_struct *idle)  in hip01_boot_secondary()  argument
159 	node = of_find_compatible_node(NULL, NULL, "hisilicon,hip01-sysctrl");  in hip01_boot_secondary()
161 		return -1;  in hip01_boot_secondary()
171 	hip01_set_cpu(cpu, true);  in hip01_boot_secondary()
181 CPU_METHOD_OF_DECLARE(hi3xxx_smp, "hisilicon,hi3620-smp", &hi3xxx_smp_ops);
182 CPU_METHOD_OF_DECLARE(hix5hd2_smp, "hisilicon,hix5hd2-smp", &hix5hd2_smp_ops);
183 CPU_METHOD_OF_DECLARE(hip01_smp, "hisilicon,hip01-smp", &hip01_smp_ops);