Lines Matching +full:0 +full:xfc000000
31 cmp r1,#0
32 str r3,[r0,#0] @ zero hash value
43 moveq r0,#0
54 ldrb r4,[r1,#0]
55 mov r10,#0x0fffffff
57 and r3,r10,#-4 @ 0x0ffffffc
113 str r4,[r0,#0]
124 mov r0,#0
133 .word 0xe12fff1e @ interoperable with Thumb ISA:-)
166 mov r2,#0
167 teq lr,#0
182 cmp r3,#0
255 adc r8,r8,#0
265 str r0,[sp,#0] @ future r4
270 adc lr,r3,#0 @ future r6
284 ldr r4,[sp,#0]
290 adc r1,r1,#0
293 adc r3,r3,#0
300 adcs r5,r5,#0
301 adcs r6,r6,#0
302 adcs r7,r7,#0
303 adc r8,r8,#0
319 .word 0xe12fff1e @ interoperable with Thumb ISA:-)
340 mov r0,#0
354 adcs r9,r4,#0
355 adcs r10,r5,#0
356 adcs r11,r6,#0
357 adc r0,r7,#0
364 ldr r8,[r2,#0]
393 str r3,[r1,#0]
398 strb r3,[r1,#0]
436 .word 0xe12fff1e @ interoperable with Thumb ISA:-)
455 and r2,r4,#0x03ffffff @ base 2^32 -> base 2^26
463 and r3,r3,#0x03ffffff
464 and r4,r4,#0x03ffffff
465 and r5,r5,#0x03ffffff
538 @ >>+ denotes Hnext += Hn>>26, Hn &= 0x3ffffff. This means that
575 vbic.i32 d16,#0xfc000000 @ &=0x03ffffff
577 vbic.i32 d10,#0xfc000000
584 vbic.i32 d18,#0xfc000000
585 vbic.i32 d12,#0xfc000000
593 vbic.i32 d14,#0xfc000000
596 vbic.i32 d10,#0xfc000000
598 vbic.i32 d16,#0xfc000000
605 add r6,r0,#(48+0*9*4)
623 vst4.32 {d0[0],d1[0],d2[0],d3[0]},[r6]!
625 vst4.32 {d4[0],d5[0],d6[0],d7[0]},[r6]!
627 vst1.32 {d8[0]},[r6,:32]
651 vst4.32 {d0[0],d1[0],d2[0],d3[0]},[r6]!
653 vst4.32 {d4[0],d5[0],d6[0],d7[0]},[r6]!
655 vst1.32 {d8[0]},[r6]
680 ldr r4,[r0,#0] @ load hash value base 2^32
686 and r2,r4,#0x03ffffff @ base 2^32 -> base 2^26
698 and r3,r3,#0x03ffffff
701 and r4,r4,#0x03ffffff
703 and r5,r5,#0x03ffffff
706 vmov.32 d10[0],r2
707 vmov.32 d12[0],r3
708 vmov.32 d14[0],r4
709 vmov.32 d16[0],r5
710 vmov.32 d18[0],r6
726 vld4.32 {d10[0],d12[0],d14[0],d16[0]},[r0]!
728 vld1.32 {d18[0]},[r0]
737 vld4.32 {d20[0],d22[0],d24[0],d26[0]},[r1]!
738 vmov.32 d28[0],r3
755 vbic.i32 d26,#0xfc000000
759 vbic.i32 d24,#0xfc000000
763 vbic.i32 d20,#0xfc000000
764 vbic.i32 d22,#0xfc000000
783 vld4.32 {d20,d22,d24,d26},[r1] @ inp[0:1]
785 vld4.32 {d21,d23,d25,d27},[r4] @ inp[2:3] (or 0)
803 vbic.i32 q13,#0xfc000000
807 vbic.i32 q12,#0xfc000000
810 vbic.i32 q10,#0xfc000000
811 vbic.i32 q11,#0xfc000000
816 vld4.32 {d0[0],d1[0],d2[0],d3[0]},[r6]! @ load r^4
818 vld4.32 {d4[0],d5[0],d6[0],d7[0]},[r6]!
824 @ ((inp[0]*r^4+inp[2]*r^2+inp[4])*r^4+inp[6]*r^2
827 @ ((inp[0]*r^4+inp[2]*r^2+inp[4])*r^4+inp[6]*r^2+inp[8])*r^2
843 vadd.i32 d24,d24,d14 @ accumulate inp[0:1]
882 vld4.32 {d21,d23,d25,d27},[r4] @ inp[2:3] (or 0)
886 @ (hash+inp[0:1])*r^4 and accumulate
888 vmlal.u32 q8,d26,d0[0]
889 vmlal.u32 q5,d20,d0[0]
890 vmlal.u32 q9,d28,d0[0]
891 vmlal.u32 q6,d22,d0[0]
892 vmlal.u32 q7,d24,d0[0]
893 vld1.32 d8[0],[r6,:32]
895 vmlal.u32 q8,d24,d1[0]
896 vmlal.u32 q5,d28,d2[0]
897 vmlal.u32 q9,d26,d1[0]
898 vmlal.u32 q6,d20,d1[0]
899 vmlal.u32 q7,d22,d1[0]
901 vmlal.u32 q8,d22,d3[0]
902 vmlal.u32 q5,d26,d4[0]
903 vmlal.u32 q9,d24,d3[0]
904 vmlal.u32 q6,d28,d4[0]
905 vmlal.u32 q7,d20,d3[0]
907 vmlal.u32 q8,d20,d5[0]
908 vmlal.u32 q5,d24,d6[0]
909 vmlal.u32 q9,d22,d5[0]
910 vmlal.u32 q6,d26,d6[0]
911 vmlal.u32 q8,d28,d8[0]
913 vmlal.u32 q7,d28,d6[0]
914 vmlal.u32 q5,d22,d8[0]
915 vmlal.u32 q9,d20,d7[0]
917 vmlal.u32 q6,d24,d8[0]
918 vmlal.u32 q7,d26,d8[0]
920 vld4.32 {d20,d22,d24,d26},[r1] @ inp[0:1]
931 @ inp[0:3] previously loaded to q10-q13 and smashed to q10-q14.
938 vbic.i32 d16,#0xfc000000
942 vbic.i32 d10,#0xfc000000
950 vbic.i32 d18,#0xfc000000
952 vbic.i32 d12,#0xfc000000
956 vbic.i32 q13,#0xfc000000
963 vbic.i32 d14,#0xfc000000
964 vbic.i32 q12,#0xfc000000
969 vbic.i32 q10,#0xfc000000
971 vbic.i32 d16,#0xfc000000
972 vbic.i32 d10,#0xfc000000
975 vbic.i32 q11,#0xfc000000
981 @ multiply (inp[0:1]+hash) or inp[2:3] by r^2:r^1
983 add r7,r0,#(48+0*9*4)
987 movne r2,#0
998 vld4.32 {d0[0],d1[0],d2[0],d3[0]},[r6]! @ load r^2
1014 vld4.32 {d4[0],d5[0],d6[0],d7[0]},[r6]!
1022 vld1.32 d8[0],[r6,:32]
1048 @ (hash+inp[0:1])*r^4:r^3 and accumulate
1051 vld4.32 {d0[0],d1[0],d2[0],d3[0]},[r6]! @ load r^4
1062 vld4.32 {d4[0],d5[0],d6[0],d7[0]},[r6]!
1070 vld1.32 d8[0],[r6,:32]
1129 cmp r2,#0
1135 vst4.32 {d10[0],d12[0],d14[0],d16[0]},[r0]!
1136 vst1.32 {d18[0]},[r0]
1145 .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0