Lines Matching +full:standard +full:- +full:mode
1 # SPDX-License-Identifier: GPL-2.0
13 tristate "SHA1 digest algorithm (ARM-asm)"
17 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented
27 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented
37 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented
41 tristate "SHA-224/256 digest algorithm (ARM v8 Crypto Extensions)"
46 SHA-256 secure hash standard (DFIPS 180-2) implemented
50 tristate "SHA-224/256 digest algorithm (ARM-asm and NEON)"
54 SHA-256 secure hash standard (DFIPS 180-2) implemented
58 tristate "SHA-384/512 digest algorithm (ARM-asm and NEON)"
62 SHA-512 secure hash standard (DFIPS 180-2) implemented
74 blocks, the NEON bit-sliced implementation is usually faster.
91 Bit sliced AES gives around 45% speedup on Cortex-A15 for CTR mode
92 and for XTS mode encryption, CBC and XTS mode decryption speedup is
108 tristate "PMULL-accelerated GHASH using NEON/ARMv8 Crypto Extensions"
114 Use an implementation of GHASH (used by the GCM AEAD chaining mode)