Lines Matching +full:0 +full:- +full:4
1 // SPDX-License-Identifier: GPL-2.0
6 * Cortex-A15_A7 MPCore (V2P-CA15_A7)
8 * HBI-0249A
11 /dts-v1/;
12 #include "vexpress-v2m-rs1.dtsi"
15 model = "V2P-CA15_CA7";
16 arm,hbi = <0x249>;
17 arm,vexpress,site = <0xf>;
18 compatible = "arm,vexpress,v2p-ca15_a7", "arm,vexpress";
19 interrupt-parent = <&gic>;
20 #address-cells = <2>;
21 #size-cells = <2>;
35 #address-cells = <1>;
36 #size-cells = <0>;
38 cpu0: cpu@0 {
40 compatible = "arm,cortex-a15";
41 reg = <0>;
42 cci-control-port = <&cci_control1>;
43 cpu-idle-states = <&CLUSTER_SLEEP_BIG>;
44 capacity-dmips-mhz = <1024>;
45 dynamic-power-coefficient = <990>;
50 compatible = "arm,cortex-a15";
52 cci-control-port = <&cci_control1>;
53 cpu-idle-states = <&CLUSTER_SLEEP_BIG>;
54 capacity-dmips-mhz = <1024>;
55 dynamic-power-coefficient = <990>;
60 compatible = "arm,cortex-a7";
61 reg = <0x100>;
62 cci-control-port = <&cci_control2>;
63 cpu-idle-states = <&CLUSTER_SLEEP_LITTLE>;
64 capacity-dmips-mhz = <516>;
65 dynamic-power-coefficient = <133>;
70 compatible = "arm,cortex-a7";
71 reg = <0x101>;
72 cci-control-port = <&cci_control2>;
73 cpu-idle-states = <&CLUSTER_SLEEP_LITTLE>;
74 capacity-dmips-mhz = <516>;
75 dynamic-power-coefficient = <133>;
78 cpu4: cpu@4 {
80 compatible = "arm,cortex-a7";
81 reg = <0x102>;
82 cci-control-port = <&cci_control2>;
83 cpu-idle-states = <&CLUSTER_SLEEP_LITTLE>;
84 capacity-dmips-mhz = <516>;
85 dynamic-power-coefficient = <133>;
88 idle-states {
89 CLUSTER_SLEEP_BIG: cluster-sleep-big {
90 compatible = "arm,idle-state";
91 local-timer-stop;
92 entry-latency-us = <1000>;
93 exit-latency-us = <700>;
94 min-residency-us = <2000>;
97 CLUSTER_SLEEP_LITTLE: cluster-sleep-little {
98 compatible = "arm,idle-state";
99 local-timer-stop;
100 entry-latency-us = <1000>;
101 exit-latency-us = <500>;
102 min-residency-us = <2500>;
109 reg = <0 0x80000000 0 0x40000000>;
112 reserved-memory {
113 #address-cells = <2>;
114 #size-cells = <2>;
117 /* Chipselect 2 is physically at 0x18000000 */
120 compatible = "shared-dma-pool";
121 reg = <0 0x18000000 0 0x00800000>;
122 no-map;
128 reg = <0 0x2a490000 0 0x1000>;
129 interrupts = <0 98 4>;
131 clock-names = "wdog_clk", "apb_pclk";
136 reg = <0 0x2b000000 0 0x1000>;
137 interrupts = <0 85 4>;
139 clock-names = "pxlclk";
142 memory-controller@2b0a0000 {
144 reg = <0 0x2b0a0000 0 0x1000>;
146 clock-names = "apb_pclk";
149 gic: interrupt-controller@2c001000 {
150 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
151 #interrupt-cells = <3>;
152 #address-cells = <0>;
153 interrupt-controller;
154 reg = <0 0x2c001000 0 0x1000>,
155 <0 0x2c002000 0 0x2000>,
156 <0 0x2c004000 0 0x2000>,
157 <0 0x2c006000 0 0x2000>;
158 interrupts = <1 9 0xf04>;
162 compatible = "arm,cci-400";
163 #address-cells = <1>;
164 #size-cells = <1>;
165 reg = <0 0x2c090000 0 0x1000>;
166 ranges = <0x0 0x0 0x2c090000 0x10000>;
168 cci_control1: slave-if@4000 {
169 compatible = "arm,cci-400-ctrl-if";
170 interface-type = "ace";
171 reg = <0x4000 0x1000>;
174 cci_control2: slave-if@5000 {
175 compatible = "arm,cci-400-ctrl-if";
176 interface-type = "ace";
177 reg = <0x5000 0x1000>;
181 compatible = "arm,cci-400-pmu,r0";
182 reg = <0x9000 0x5000>;
183 interrupts = <0 105 4>,
184 <0 101 4>,
185 <0 102 4>,
186 <0 103 4>,
187 <0 104 4>;
191 memory-controller@7ffd0000 {
193 reg = <0 0x7ffd0000 0 0x1000>;
194 interrupts = <0 86 4>,
195 <0 87 4>;
197 clock-names = "apb_pclk";
202 reg = <0 0x7ff00000 0 0x1000>;
203 interrupts = <0 92 4>,
204 <0 88 4>,
205 <0 89 4>,
206 <0 90 4>,
207 <0 91 4>;
209 clock-names = "apb_pclk";
213 compatible = "arm,vexpress-scc,v2p-ca15_a7", "arm,vexpress-scc";
214 reg = <0 0x7fff0000 0 0x1000>;
215 interrupts = <0 95 4>;
219 compatible = "arm,armv7-timer";
220 interrupts = <1 13 0xf08>,
221 <1 14 0xf08>,
222 <1 11 0xf08>,
223 <1 10 0xf08>;
226 pmu-a15 {
227 compatible = "arm,cortex-a15-pmu";
228 interrupts = <0 68 4>,
229 <0 69 4>;
230 interrupt-affinity = <&cpu0>,
234 pmu-a7 {
235 compatible = "arm,cortex-a7-pmu";
236 interrupts = <0 128 4>,
237 <0 129 4>,
238 <0 130 4>;
239 interrupt-affinity = <&cpu2>,
246 compatible = "fixed-clock";
247 #clock-cells = <0>;
248 clock-frequency = <24000000>;
249 clock-output-names = "oscclk6a";
253 compatible = "arm,vexpress,config-bus";
254 arm,vexpress,config-bridge = <&v2m_sysreg>;
257 /* A15 PLL 0 reference clock */
258 compatible = "arm,vexpress-osc";
259 arm,vexpress-sysreg,func = <1 0>;
260 freq-range = <17000000 50000000>;
261 #clock-cells = <0>;
262 clock-output-names = "oscclk0";
267 compatible = "arm,vexpress-osc";
268 arm,vexpress-sysreg,func = <1 1>;
269 freq-range = <17000000 50000000>;
270 #clock-cells = <0>;
271 clock-output-names = "oscclk1";
275 /* A7 PLL 0 reference clock */
276 compatible = "arm,vexpress-osc";
277 arm,vexpress-sysreg,func = <1 2>;
278 freq-range = <17000000 50000000>;
279 #clock-cells = <0>;
280 clock-output-names = "oscclk2";
285 compatible = "arm,vexpress-osc";
286 arm,vexpress-sysreg,func = <1 3>;
287 freq-range = <17000000 50000000>;
288 #clock-cells = <0>;
289 clock-output-names = "oscclk3";
294 compatible = "arm,vexpress-osc";
295 arm,vexpress-sysreg,func = <1 4>;
296 freq-range = <20000000 40000000>;
297 #clock-cells = <0>;
298 clock-output-names = "oscclk4";
303 compatible = "arm,vexpress-osc";
304 arm,vexpress-sysreg,func = <1 5>;
305 freq-range = <23750000 165000000>;
306 #clock-cells = <0>;
307 clock-output-names = "oscclk5";
312 compatible = "arm,vexpress-osc";
313 arm,vexpress-sysreg,func = <1 6>;
314 freq-range = <20000000 40000000>;
315 #clock-cells = <0>;
316 clock-output-names = "oscclk6";
321 compatible = "arm,vexpress-osc";
322 arm,vexpress-sysreg,func = <1 7>;
323 freq-range = <17000000 50000000>;
324 #clock-cells = <0>;
325 clock-output-names = "oscclk7";
330 compatible = "arm,vexpress-osc";
331 arm,vexpress-sysreg,func = <1 8>;
332 freq-range = <20000000 50000000>;
333 #clock-cells = <0>;
334 clock-output-names = "oscclk8";
337 volt-a15 {
339 compatible = "arm,vexpress-volt";
340 arm,vexpress-sysreg,func = <2 0>;
341 regulator-name = "A15 Vcore";
342 regulator-min-microvolt = <800000>;
343 regulator-max-microvolt = <1050000>;
344 regulator-always-on;
348 volt-a7 {
350 compatible = "arm,vexpress-volt";
351 arm,vexpress-sysreg,func = <2 1>;
352 regulator-name = "A7 Vcore";
353 regulator-min-microvolt = <800000>;
354 regulator-max-microvolt = <1050000>;
355 regulator-always-on;
359 amp-a15 {
361 compatible = "arm,vexpress-amp";
362 arm,vexpress-sysreg,func = <3 0>;
366 amp-a7 {
368 compatible = "arm,vexpress-amp";
369 arm,vexpress-sysreg,func = <3 1>;
373 temp-dcc {
375 compatible = "arm,vexpress-temp";
376 arm,vexpress-sysreg,func = <4 0>;
380 power-a15 {
382 compatible = "arm,vexpress-power";
383 arm,vexpress-sysreg,func = <12 0>;
387 power-a7 {
389 compatible = "arm,vexpress-power";
390 arm,vexpress-sysreg,func = <12 1>;
394 energy-a15 {
396 compatible = "arm,vexpress-energy";
397 arm,vexpress-sysreg,func = <13 0>, <13 1>;
401 energy-a7 {
403 compatible = "arm,vexpress-energy";
404 arm,vexpress-sysreg,func = <13 2>, <13 3>;
410 compatible = "arm,coresight-etb10", "arm,primecell";
411 reg = <0 0x20010000 0 0x1000>;
414 clock-names = "apb_pclk";
415 in-ports {
418 remote-endpoint = <&replicator_out_port0>;
425 compatible = "arm,coresight-tpiu", "arm,primecell";
426 reg = <0 0x20030000 0 0x1000>;
429 clock-names = "apb_pclk";
430 in-ports {
433 remote-endpoint = <&replicator_out_port1>;
440 /* non-configurable replicators don't show up on the
443 compatible = "arm,coresight-static-replicator";
445 out-ports {
446 #address-cells = <1>;
447 #size-cells = <0>;
449 port@0 {
450 reg = <0>;
452 remote-endpoint = <&etb_in_port>;
459 remote-endpoint = <&tpiu_in_port>;
464 in-ports {
467 remote-endpoint = <&funnel_out_port0>;
474 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
475 reg = <0 0x20040000 0 0x1000>;
478 clock-names = "apb_pclk";
479 out-ports {
482 remote-endpoint =
488 in-ports {
489 #address-cells = <1>;
490 #size-cells = <0>;
492 port@0 {
493 reg = <0>;
495 remote-endpoint = <&ptm0_out_port>;
502 remote-endpoint = <&ptm1_out_port>;
509 remote-endpoint = <&etm0_out_port>;
515 port@4 {
516 reg = <4>;
518 remote-endpoint = <&etm1_out_port>;
525 remote-endpoint = <&etm2_out_port>;
532 compatible = "arm,coresight-etm3x", "arm,primecell";
533 reg = <0 0x2201c000 0 0x1000>;
537 clock-names = "apb_pclk";
538 out-ports {
541 remote-endpoint = <&funnel_in_port0>;
548 compatible = "arm,coresight-etm3x", "arm,primecell";
549 reg = <0 0x2201d000 0 0x1000>;
553 clock-names = "apb_pclk";
554 out-ports {
557 remote-endpoint = <&funnel_in_port1>;
564 compatible = "arm,coresight-etm3x", "arm,primecell";
565 reg = <0 0x2203c000 0 0x1000>;
569 clock-names = "apb_pclk";
570 out-ports {
573 remote-endpoint = <&funnel_in_port2>;
580 compatible = "arm,coresight-etm3x", "arm,primecell";
581 reg = <0 0x2203d000 0 0x1000>;
585 clock-names = "apb_pclk";
586 out-ports {
589 remote-endpoint = <&funnel_in_port4>;
596 compatible = "arm,coresight-etm3x", "arm,primecell";
597 reg = <0 0x2203e000 0 0x1000>;
601 clock-names = "apb_pclk";
602 out-ports {
605 remote-endpoint = <&funnel_in_port5>;
612 compatible = "simple-bus";
614 #address-cells = <2>;
615 #size-cells = <1>;
616 ranges = <0 0 0 0x08000000 0x04000000>,
617 <1 0 0 0x14000000 0x04000000>,
618 <2 0 0 0x18000000 0x04000000>,
619 <3 0 0 0x1c000000 0x04000000>,
620 <4 0 0 0x0c000000 0x04000000>,
621 <5 0 0 0x10000000 0x04000000>;
623 #interrupt-cells = <1>;
624 interrupt-map-mask = <0 0 63>;
625 interrupt-map = <0 0 0 &gic 0 0 4>,
626 <0 0 1 &gic 0 1 4>,
627 <0 0 2 &gic 0 2 4>,
628 <0 0 3 &gic 0 3 4>,
629 <0 0 4 &gic 0 4 4>,
630 <0 0 5 &gic 0 5 4>,
631 <0 0 6 &gic 0 6 4>,
632 <0 0 7 &gic 0 7 4>,
633 <0 0 8 &gic 0 8 4>,
634 <0 0 9 &gic 0 9 4>,
635 <0 0 10 &gic 0 10 4>,
636 <0 0 11 &gic 0 11 4>,
637 <0 0 12 &gic 0 12 4>,
638 <0 0 13 &gic 0 13 4>,
639 <0 0 14 &gic 0 14 4>,
640 <0 0 15 &gic 0 15 4>,
641 <0 0 16 &gic 0 16 4>,
642 <0 0 17 &gic 0 17 4>,
643 <0 0 18 &gic 0 18 4>,
644 <0 0 19 &gic 0 19 4>,
645 <0 0 20 &gic 0 20 4>,
646 <0 0 21 &gic 0 21 4>,
647 <0 0 22 &gic 0 22 4>,
648 <0 0 23 &gic 0 23 4>,
649 <0 0 24 &gic 0 24 4>,
650 <0 0 25 &gic 0 25 4>,
651 <0 0 26 &gic 0 26 4>,
652 <0 0 27 &gic 0 27 4>,
653 <0 0 28 &gic 0 28 4>,
654 <0 0 29 &gic 0 29 4>,
655 <0 0 30 &gic 0 30 4>,
656 <0 0 31 &gic 0 31 4>,
657 <0 0 32 &gic 0 32 4>,
658 <0 0 33 &gic 0 33 4>,
659 <0 0 34 &gic 0 34 4>,
660 <0 0 35 &gic 0 35 4>,
661 <0 0 36 &gic 0 36 4>,
662 <0 0 37 &gic 0 37 4>,
663 <0 0 38 &gic 0 38 4>,
664 <0 0 39 &gic 0 39 4>,
665 <0 0 40 &gic 0 40 4>,
666 <0 0 41 &gic 0 41 4>,
667 <0 0 42 &gic 0 42 4>;
671 compatible = "simple-bus";
672 #address-cells = <1>;
673 #size-cells = <1>;
674 ranges = <0 0 0x40000000 0x3fef0000>;
675 #interrupt-cells = <1>;
676 interrupt-map-mask = <0 3>;
677 interrupt-map = <0 0 &gic 0 36 4>,
678 <0 1 &gic 0 37 4>,
679 <0 2 &gic 0 38 4>,
680 <0 3 &gic 0 39 4>;