boot/dts/stm32f746.dtsi

45 #include <dt-bindings/mfd/stm32f7-rcc.h>
82 			clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM2)>;
91 			clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM2)>;
112 			clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM3)>;
121 			clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM3)>;
142 			clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM4)>;
151 			clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM4)>;
172 			clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM5)>;
180 			clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM5)>;
201 			clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM6)>;
210 			clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM6)>;
225 			clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM7)>;
234 			clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM7)>;
250 			clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM12)>;
272 			clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM13)>;
288 			clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM14)>;
302 			clocks = <&rcc 1 CLK_RTC>;
303 			assigned-clocks = <&rcc 1 CLK_RTC>;
304 			assigned-clock-parents = <&rcc 1 CLK_LSE>;
315 			clocks = <&rcc 1 CLK_USART2>;
323 			clocks = <&rcc 1 CLK_USART3>;
331 			clocks = <&rcc 1 CLK_UART4>;
339 			clocks = <&rcc 1 CLK_UART5>;
348 			resets = <&rcc STM32F7_APB1_RESET(I2C1)>;
349 			clocks = <&rcc 1 CLK_I2C1>;
360 			resets = <&rcc STM32F7_APB1_RESET(I2C2)>;
361 			clocks = <&rcc 1 CLK_I2C2>;
372 			resets = <&rcc STM32F7_APB1_RESET(I2C3)>;
373 			clocks = <&rcc 1 CLK_I2C3>;
384 			resets = <&rcc STM32F7_APB1_RESET(I2C4)>;
385 			clocks = <&rcc 1 CLK_I2C4>;
395 			clocks = <&rcc 0 STM32F7_APB1_CLOCK(CEC)>, <&rcc 1 CLK_HDMI_CEC>;
404 			clocks = <&rcc 1 CLK_UART7>;
412 			clocks = <&rcc 1 CLK_UART8>;
421 			clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM1)>;
443 			clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM8)>;
464 			clocks = <&rcc 1 CLK_USART1>;
472 			clocks = <&rcc 1 CLK_USART6>;
480 			clocks = <&rcc 0 STM32F7_APB2_CLOCK(SDMMC2)>;
491 			clocks = <&rcc 0 STM32F7_APB2_CLOCK(SDMMC1)>;
516 			clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM9)>;
538 			clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM10)>;
554 			clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM11)>;
573 			clocks = <&rcc 0 12>;
577 		rcc: rcc@40023800 {  label
580 			compatible = "st,stm32f746-rcc", "st,stm32-rcc";
584 			assigned-clocks = <&rcc 1 CLK_HSE_RTC>;
599 			clocks = <&rcc 0 STM32F7_AHB1_CLOCK(DMA1)>;
615 			clocks = <&rcc 0 STM32F7_AHB1_CLOCK(DMA2)>;
625 			clocks = <&rcc 0 STM32F7_AHB1_CLOCK(OTGHS)>;
637 			clocks = <&rcc 0 STM32F7_AHB2_CLOCK(OTGFS)>;
645 	clocks = <&rcc 1 0>;