Lines Matching +full:0 +full:x400
15 ranges = <0 0x40020000 0x3000>;
17 st,syscfg = <&syscfg 0x8>;
25 reg = <0x0 0x400>;
26 clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOA)>;
35 reg = <0x400 0x400>;
36 clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOB)>;
45 reg = <0x800 0x400>;
46 clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOC)>;
55 reg = <0xc00 0x400>;
56 clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOD)>;
65 reg = <0x1000 0x400>;
66 clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOE)>;
75 reg = <0x1400 0x400>;
76 clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOF)>;
85 reg = <0x1800 0x400>;
86 clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOG)>;
95 reg = <0x1c00 0x400>;
96 clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOH)>;
105 reg = <0x2000 0x400>;
106 clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOI)>;
115 reg = <0x2400 0x400>;
116 clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOJ)>;
125 reg = <0x2800 0x400>;
126 clocks = <&rcc 0 STM32F7_AHB1_CLOCK(GPIOK)>;
130 cec_pins_a: cec-0 {
133 slew-rate = <0>;
139 usart1_pins_a: usart1-0 {
144 slew-rate = <0>;
157 slew-rate = <0>;
165 i2c1_pins_b: i2c1-0 {
171 slew-rate = <0>;
175 usbotg_hs_pins_a: usbotg-hs-0 {
179 <STM32_PINMUX('C', 0, AF10)>, /* OTG_HS_ULPI_STP */
182 <STM32_PINMUX('B', 0, AF10)>, /* OTG_HS_ULPI_D1 */
199 <STM32_PINMUX('C', 0, AF10)>, /* OTG_HS_ULPI_STP */
202 <STM32_PINMUX('B', 0, AF10)>, /* OTG_HS_ULPI_D1 */
215 usbotg_fs_pins_a: usbotg-fs-0 {
226 sdio_pins_a: sdio-pins-a-0 {
239 sdio_pins_od_a: sdio-pins-od-a-0 {
257 sdio_pins_b: sdio-pins-b-0 {
270 sdio_pins_od_b: sdio-pins-od-b-0 {