boot/dts/stih407-family.dtsi

1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "stih407-pinctrl.dtsi"
7 #include <dt-bindings/mfd/st-lpc.h>
8 #include <dt-bindings/phy/phy.h>
9 #include <dt-bindings/reset/stih407-resets.h>
10 #include <dt-bindings/interrupt-controller/irq-st.h>
12 	#address-cells = <1>;
13 	#size-cells = <1>;
15 	reserved-memory {
16 		#address-cells = <1>;
17 		#size-cells = <1>;
21 			compatible = "shared-dma-pool";
23 			no-map;
27 			compatible = "shared-dma-pool";
29 			no-map;
34 		#address-cells = <1>;
35 		#size-cells = <0>;
38 			compatible = "arm,cortex-a9";
41 			/* u-boot puts hpen in SBC dmem at 0xa4 offset */
42 			cpu-release-addr = <0x94100A4>;
45 			operating-points = <1500000 0
51 			clock-names = "cpu";
52 			clock-latency = <100000>;
53 			cpu0-supply = <&pwm_regulator>;
58 			compatible = "arm,cortex-a9";
61 			/* u-boot puts hpen in SBC dmem at 0xa4 offset */
62 			cpu-release-addr = <0x94100A4>;
65 			operating-points = <1500000 0
72 	intc: interrupt-controller@8761000 {
73 		compatible = "arm,cortex-a9-gic";
74 		#interrupt-cells = <3>;
75 		interrupt-controller;
80 		compatible = "arm,cortex-a9-scu";
85 		interrupt-parent = <&intc>;
86 		compatible = "arm,cortex-a9-global-timer";
92 	l2: cache-controller@8762000 {
93 		compatible = "arm,pl310-cache";
95 		arm,data-latency = <3 3 3>;
96 		arm,tag-latency = <2 2 2>;
97 		cache-unified;
98 		cache-level = <2>;
101 	arm-pmu {
102 		interrupt-parent = <&intc>;
103 		compatible = "arm,cortex-a9-pmu";
107 	pwm_regulator: pwm-regulator {
108 		compatible = "pwm-regulator";
110 		regulator-name = "CPU_1V0_AVS";
111 		regulator-min-microvolt = <784000>;
112 		regulator-max-microvolt = <1299000>;
113 		regulator-always-on;
114 		max-duty-cycle = <255>;
119 		#address-cells = <1>;
120 		#size-cells = <1>;
121 		interrupt-parent = <&intc>;
123 		compatible = "simple-bus";
125 		restart: restart-controller@0 {
126 			compatible = "st,stih407-restart";
132 		powerdown: powerdown-controller@0 {
133 			compatible = "st,stih407-powerdown";
135 			#reset-cells = <1>;
138 		softreset: softreset-controller@0 {
139 			compatible = "st,stih407-softreset";
141 			#reset-cells = <1>;
144 		picophyreset: picophyreset-controller@0 {
145 			compatible = "st,stih407-picophyreset";
147 			#reset-cells = <1>;
150 		syscfg_sbc: sbc-syscfg@9620000 {
151 			compatible = "st,stih407-sbc-syscfg", "syscon";
155 		syscfg_front: front-syscfg@9280000 {
156 			compatible = "st,stih407-front-syscfg", "syscon";
160 		syscfg_rear: rear-syscfg@9290000 {
161 			compatible = "st,stih407-rear-syscfg", "syscon";
165 		syscfg_flash: flash-syscfg@92a0000 {
166 			compatible = "st,stih407-flash-syscfg", "syscon";
170 		syscfg_sbc_reg: fvdp-lite-syscfg@9600000 {
171 			compatible = "st,stih407-sbc-reg-syscfg", "syscon";
175 		syscfg_core: core-syscfg@92b0000 {
176 			compatible = "st,stih407-core-syscfg", "syscon";
179 			sti_sasg_codec: sti-sasg-codec {
180 				compatible = "st,stih407-sas-codec";
181 				#sound-dai-cells = <1>;
187 		syscfg_lpm: lpm-syscfg@94b5100 {
188 			compatible = "st,stih407-lpm-syscfg", "syscon";
192 		irq-syscfg@0 {
193 			compatible    = "st,stih407-irq-syscfg";
196 			st,irq-device = <ST_IRQ_SYSCFG_PMU_0>,
198 			st,fiq-device = <ST_IRQ_SYSCFG_DISABLED>,
203 		vtg_main: sti-vtg-main@8d02800 {
209 		vtg_aux: sti-vtg-aux@8d00200 {
220 			/* Pinctrl moved out to a per-board configuration */
229 			pinctrl-names = "default";
230 			pinctrl-0 = <&pinctrl_serial1>;
240 			pinctrl-names = "default";
241 			pinctrl-0 = <&pinctrl_serial2>;
247 		/* SBC_ASC0 - UART10 */
252 			pinctrl-names = "default";
253 			pinctrl-0 = <&pinctrl_sbc_serial0>;
263 			pinctrl-names = "default";
264 			pinctrl-0 = <&pinctrl_sbc_serial1>;
271 			compatible = "st,comms-ssc4-i2c";
275 			clock-names = "ssc";
276 			clock-frequency = <400000>;
277 			pinctrl-names = "default";
278 			pinctrl-0 = <&pinctrl_i2c0_default>;
279 			#address-cells = <1>;
280 			#size-cells = <0>;
286 			compatible = "st,comms-ssc4-i2c";
290 			clock-names = "ssc";
291 			clock-frequency = <400000>;
292 			pinctrl-names = "default";
293 			pinctrl-0 = <&pinctrl_i2c1_default>;
294 			#address-cells = <1>;
295 			#size-cells = <0>;
301 			compatible = "st,comms-ssc4-i2c";
305 			clock-names = "ssc";
306 			clock-frequency = <400000>;
307 			pinctrl-names = "default";
308 			pinctrl-0 = <&pinctrl_i2c2_default>;
309 			#address-cells = <1>;
310 			#size-cells = <0>;
316 			compatible = "st,comms-ssc4-i2c";
320 			clock-names = "ssc";
321 			clock-frequency = <400000>;
322 			pinctrl-names = "default";
323 			pinctrl-0 = <&pinctrl_i2c3_default>;
324 			#address-cells = <1>;
325 			#size-cells = <0>;
331 			compatible = "st,comms-ssc4-i2c";
335 			clock-names = "ssc";
336 			clock-frequency = <400000>;
337 			pinctrl-names = "default";
338 			pinctrl-0 = <&pinctrl_i2c4_default>;
339 			#address-cells = <1>;
340 			#size-cells = <0>;
346 			compatible = "st,comms-ssc4-i2c";
350 			clock-names = "ssc";
351 			clock-frequency = <400000>;
352 			pinctrl-names = "default";
353 			pinctrl-0 = <&pinctrl_i2c5_default>;
354 			#address-cells = <1>;
355 			#size-cells = <0>;
363 			compatible = "st,comms-ssc4-i2c";
367 			clock-names = "ssc";
368 			clock-frequency = <400000>;
369 			pinctrl-names = "default";
370 			pinctrl-0 = <&pinctrl_i2c10_default>;
371 			#address-cells = <1>;
372 			#size-cells = <0>;
378 			compatible = "st,comms-ssc4-i2c";
382 			clock-names = "ssc";
383 			clock-frequency = <400000>;
384 			pinctrl-names = "default";
385 			pinctrl-0 = <&pinctrl_i2c11_default>;
386 			#address-cells = <1>;
387 			#size-cells = <0>;
393 			compatible = "st,stih407-usb2-phy";
395 			#phy-cells = <0>;
399 			reset-names = "global", "port";
403 			compatible = "st,miphy28lp-phy";
405 			#address-cells	= <1>;
406 			#size-cells	= <1>;
414 				reg-names = "sata-up",
415 					    "pcie-up",
419 				#phy-cells = <1>;
421 				reset-names = "miphy-sw-rst";
429 				reg-names = "sata-up",
430 					    "pcie-up",
435 				#phy-cells = <1>;
437 				reset-names = "miphy-sw-rst";
444 				reg-names = "pipew",
445 					    "usb3-up";
449 				#phy-cells = <1>;
451 				reset-names = "miphy-sw-rst";
457 			compatible = "st,comms-ssc4-spi";
461 			clock-names = "ssc";
462 			pinctrl-0 = <&pinctrl_spi0_default>;
463 			pinctrl-names = "default";
464 			#address-cells = <1>;
465 			#size-cells = <0>;
471 			compatible = "st,comms-ssc4-spi";
475 			clock-names = "ssc";
476 			pinctrl-names = "default";
477 			pinctrl-0 = <&pinctrl_spi1_default>;
478 			#address-cells = <1>;
479 			#size-cells = <0>;
485 			compatible = "st,comms-ssc4-spi";
489 			clock-names = "ssc";
490 			pinctrl-names = "default";
491 			pinctrl-0 = <&pinctrl_spi2_default>;
492 			#address-cells = <1>;
493 			#size-cells = <0>;
499 			compatible = "st,comms-ssc4-spi";
503 			clock-names = "ssc";
504 			pinctrl-names = "default";
505 			pinctrl-0 = <&pinctrl_spi3_default>;
506 			#address-cells = <1>;
507 			#size-cells = <0>;
513 			compatible = "st,comms-ssc4-spi";
517 			clock-names = "ssc";
518 			pinctrl-names = "default";
519 			pinctrl-0 = <&pinctrl_spi4_default>;
520 			#address-cells = <1>;
521 			#size-cells = <0>;
528 			compatible = "st,comms-ssc4-spi";
532 			clock-names = "ssc";
533 			pinctrl-names = "default";
534 			pinctrl-0 = <&pinctrl_spi10_default>;
535 			#address-cells = <1>;
536 			#size-cells = <0>;
542 			compatible = "st,comms-ssc4-spi";
546 			clock-names = "ssc";
547 			pinctrl-names = "default";
548 			pinctrl-0 = <&pinctrl_spi11_default>;
549 			#address-cells = <1>;
550 			#size-cells = <0>;
556 			compatible = "st,comms-ssc4-spi";
560 			clock-names = "ssc";
561 			pinctrl-names = "default";
562 			pinctrl-0 = <&pinctrl_spi12_default>;
563 			#address-cells = <1>;
564 			#size-cells = <0>;
570 			compatible = "st,sdhci-stih407", "st,sdhci";
573 			reg-names = "mmc", "top-mmc-delay";
575 			interrupt-names = "mmcirq";
576 			pinctrl-names = "default";
577 			pinctrl-0 = <&pinctrl_mmc0>;
578 			clock-names = "mmc", "icn";
581 			bus-width = <8>;
585 			compatible = "st,sdhci-stih407", "st,sdhci";
588 			reg-names = "mmc";
590 			interrupt-names = "mmcirq";
591 			pinctrl-names = "default";
592 			pinctrl-0 = <&pinctrl_sd1>;
593 			clock-names = "mmc", "icn";
597 			bus-width = <4>;
600 		/* Watchdog and Real-Time Clock */
602 			compatible = "st,stih407-lpc";
606 			timeout-sec = <120>;
608 			st,lpc-mode = <ST_LPC_MODE_WDT>;
612 			compatible = "st,stih407-lpc";
616 			st,lpc-mode = <ST_LPC_MODE_CLKSRC>;
624 			interrupt-names = "hostc";
627 			phy-names = "ahci_phy";
632 			reset-names = "pwr-dwn", "sw-rst", "pwr-rst";
634 			clock-names = "ahci_clk";
637 			ports-implemented = <0x1>;
647 			interrupt-names = "hostc";
650 			phy-names = "ahci_phy";
655 			reset-names = "pwr-dwn",
656 				      "sw-rst",
657 				      "pwr-rst";
659 			clock-names = "ahci_clk";
662 			ports-implemented = <0x1>;
669 			compatible	= "st,stih407-dwc3";
671 			reg-names	= "reg-glue", "syscfg-reg";
675 			reset-names	= "powerdown", "softreset";
676 			#address-cells	= <1>;
677 			#size-cells	= <1>;
678 			pinctrl-names	= "default";
679 			pinctrl-0	= <&pinctrl_usb3>;
689 				phy-names	= "usb2-phy", "usb3-phy";
698 			compatible	= "st,sti-pwm";
699 			#pwm-cells	= <2>;
702 			pinctrl-names	= "default";
703 			pinctrl-0	= <&pinctrl_pwm0_chan0_default>;
704 			clock-names	= "pwm";
706 			st,pwm-num-chan = <1>;
713 			compatible	= "st,sti-pwm";
714 			#pwm-cells	= <2>;
717 			pinctrl-names	= "default";
718 			pinctrl-0	= <&pinctrl_pwm1_chan0_default
722 			clock-names	= "pwm";
724 			st,pwm-num-chan = <4>;
746 			compatible = "st,stih407-dwmac", "snps,dwmac", "snps,dwmac-3.710";
748 			reg-names = "stmmaceth", "sti-ethconf";
753 			reset-names = "stmmaceth";
757 			interrupt-names = "macirq", "eth_wake_irq";
762 			pinctrl-names = "default";
763 			pinctrl-0 = <&pinctrl_rgmii1>;
765 			clock-names = "stmmaceth", "sti-ethclk";
771 			compatible	= "st,stih407-mailbox";
774 			#mbox-cells	= <2>;
775 			mbox-name	= "a9";
780 			compatible	= "st,stih407-mailbox";
782 			#mbox-cells	= <2>;
783 			mbox-name	= "st231_gp_1";
788 			compatible	= "st,stih407-mailbox";
790 			#mbox-cells	= <2>;
791 			mbox-name	= "st231_gp_0";
796 			compatible	= "st,stih407-mailbox";
798 			#mbox-cells	= <2>;
799 			mbox-name	= "st231_audio_video";
803 		st231_gp0: st231-gp0@0 {
804 			compatible	= "st,st231-rproc";
806 			memory-region	= <&gp0_reserved>;
808 			reset-names	= "sw_reset";
810 			clock-frequency	= <600000000>;
812 			#mbox-cells = <1>;
813 			mbox-names = "vq0_rx", "vq0_tx", "vq1_rx", "vq1_tx";
817 		st231_delta: st231-delta@0 {
818 			compatible	= "st,st231-rproc";
820 			memory-region	= <&delta_reserved>;
822 			reset-names	= "sw_reset";
824 			clock-frequency	= <600000000>;
826 			#mbox-cells = <1>;
827 			mbox-names = "vq0_rx", "vq0_tx", "vq1_rx", "vq1_tx";
832 		fdma0: dma-controller@8e20000 {
833 			compatible = "st,stih407-fdma-mpe31-11", "st,slim-rproc";
838 			reg-names = "slimcore", "dmem", "peripherals", "imem";
844 			dma-channels = <16>;
845 			#dma-cells = <3>;
849 		fdma1: dma-controller@8e40000 {
850 			compatible = "st,stih407-fdma-mpe31-12", "st,slim-rproc";
855 			reg-names = "slimcore", "dmem", "peripherals", "imem";
862 			dma-channels = <16>;
863 			#dma-cells = <3>;
869 		fdma2: dma-controller@8e60000 {
870 			compatible = "st,stih407-fdma-mpe31-13", "st,slim-rproc";
875 			reg-names = "slimcore", "dmem", "peripherals", "imem";
877 			dma-channels = <16>;
878 			#dma-cells = <3>;
887 		sti_uni_player0: sti-uni-player@8d80000 {
888 			compatible = "st,stih407-uni-player-hdmi";
889 			#sound-dai-cells = <0>;
892 			assigned-clocks = <&clk_s_d0_quadfs 0>, <&clk_s_d0_flexgen CLK_PCM_0>;
893 			assigned-clock-parents = <0>, <&clk_s_d0_quadfs 0>;
894 			assigned-clock-rates = <50000000>;
898 			dma-names = "tx";
903 		sti_uni_player1: sti-uni-player@8d81000 {
904 			compatible = "st,stih407-uni-player-pcm-out";
905 			#sound-dai-cells = <0>;
908 			assigned-clocks = <&clk_s_d0_quadfs 1>, <&clk_s_d0_flexgen CLK_PCM_1>;
909 			assigned-clock-parents = <0>, <&clk_s_d0_quadfs 1>;
910 			assigned-clock-rates = <50000000>;
914 			dma-names = "tx";
919 		sti_uni_player2: sti-uni-player@8d82000 {
920 			compatible = "st,stih407-uni-player-dac";
921 			#sound-dai-cells = <0>;
924 			assigned-clocks = <&clk_s_d0_quadfs 2>, <&clk_s_d0_flexgen CLK_PCM_2>;
925 			assigned-clock-parents = <0>, <&clk_s_d0_quadfs 2>;
926 			assigned-clock-rates = <50000000>;
930 			dma-names = "tx";
935 		sti_uni_player3: sti-uni-player@8d85000 {
936 			compatible = "st,stih407-uni-player-spdif";
937 			#sound-dai-cells = <0>;
940 			assigned-clocks = <&clk_s_d0_quadfs 3>, <&clk_s_d0_flexgen CLK_SPDIFF>;
941 			assigned-clock-parents = <0>, <&clk_s_d0_quadfs 3>;
942 			assigned-clock-rates = <50000000>;
946 			dma-names = "tx";
951 		sti_uni_reader0: sti-uni-reader@8d83000 {
952 			compatible = "st,stih407-uni-reader-pcm_in";
953 			#sound-dai-cells = <0>;
958 			dma-names = "rx";
963 		sti_uni_reader1: sti-uni-reader@8d84000 {
964 			compatible = "st,stih407-uni-reader-hdmi";
965 			#sound-dai-cells = <0>;
970 			dma-names = "rx";
976 			compatible = "st,st-delta";
978 			clock-names = "delta",
979 				      "delta-st231",
980 				      "delta-flash-promip";