Lines Matching +full:reg +full:- +full:names
1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/clock/r8a73a4-clock.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
20 #address-cells = <1>;
21 #size-cells = <0>;
25 compatible = "arm,cortex-a15";
26 reg = <0>;
28 clock-frequency = <1500000000>;
29 power-domains = <&pd_a2sl>;
30 next-level-cache = <&L2_CA15>;
33 L2_CA15: cache-controller-0 {
36 power-domains = <&pd_a3sm>;
37 cache-unified;
38 cache-level = <2>;
41 L2_CA7: cache-controller-1 {
44 power-domains = <&pd_a3km>;
45 cache-unified;
46 cache-level = <2>;
51 compatible = "arm,coresight-etm3x";
52 power-domains = <&pd_d4>;
56 compatible = "arm,armv7-timer";
63 dbsc1: memory-controller@e6790000 {
64 compatible = "renesas,dbsc-r8a73a4";
65 reg = <0 0xe6790000 0 0x10000>;
66 power-domains = <&pd_a3bc>;
69 dbsc2: memory-controller@e67a0000 {
70 compatible = "renesas,dbsc-r8a73a4";
71 reg = <0 0xe67a0000 0 0x10000>;
72 power-domains = <&pd_a3bc>;
75 dmac: dma-multiplexer {
76 compatible = "renesas,shdma-mux";
77 #dma-cells = <1>;
78 dma-channels = <20>;
79 dma-requests = <256>;
80 #address-cells = <2>;
81 #size-cells = <2>;
84 dma0: dma-controller@e6700020 {
85 compatible = "renesas,shdma-r8a73a4";
86 reg = <0 0xe6700020 0 0x89e0>;
108 interrupt-names = "error",
115 power-domains = <&pd_a3sp>;
120 #address-cells = <1>;
121 #size-cells = <0>;
122 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
123 reg = <0 0xe60b0000 0 0x428>;
126 power-domains = <&pd_a3sp>;
132 compatible = "renesas,r8a73a4-cmt1", "renesas,rcar-gen2-cmt1";
133 reg = <0 0xe6130000 0 0x1004>;
143 clock-names = "fck";
144 power-domains = <&pd_c5>;
148 irqc0: interrupt-controller@e61c0000 {
149 compatible = "renesas,irqc-r8a73a4", "renesas,irqc";
150 #interrupt-cells = <2>;
151 interrupt-controller;
152 reg = <0 0xe61c0000 0 0x200>;
186 power-domains = <&pd_c4>;
189 irqc1: interrupt-controller@e61c0200 {
190 compatible = "renesas,irqc-r8a73a4", "renesas,irqc";
191 #interrupt-cells = <2>;
192 interrupt-controller;
193 reg = <0 0xe61c0200 0 0x200>;
221 power-domains = <&pd_c4>;
225 compatible = "renesas,pfc-r8a73a4";
226 reg = <0 0xe6050000 0 0x9000>;
227 gpio-controller;
228 #gpio-cells = <2>;
229 gpio-ranges =
236 interrupts-extended =
252 power-domains = <&pd_c5>;
256 compatible = "renesas,thermal-r8a73a4", "renesas,rcar-thermal";
257 reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>,
261 power-domains = <&pd_c5>;
265 #address-cells = <1>;
266 #size-cells = <0>;
267 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
268 reg = <0 0xe6500000 0 0x428>;
271 power-domains = <&pd_a3sp>;
276 #address-cells = <1>;
277 #size-cells = <0>;
278 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
279 reg = <0 0xe6510000 0 0x428>;
282 power-domains = <&pd_a3sp>;
287 #address-cells = <1>;
288 #size-cells = <0>;
289 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
290 reg = <0 0xe6520000 0 0x428>;
293 power-domains = <&pd_a3sp>;
298 #address-cells = <1>;
299 #size-cells = <0>;
300 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
301 reg = <0 0xe6530000 0 0x428>;
304 power-domains = <&pd_a3sp>;
309 #address-cells = <1>;
310 #size-cells = <0>;
311 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
312 reg = <0 0xe6540000 0 0x428>;
315 power-domains = <&pd_a3sp>;
320 #address-cells = <1>;
321 #size-cells = <0>;
322 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
323 reg = <0 0xe6550000 0 0x428>;
326 power-domains = <&pd_a3sp>;
331 #address-cells = <1>;
332 #size-cells = <0>;
333 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
334 reg = <0 0xe6560000 0 0x428>;
337 power-domains = <&pd_a3sp>;
342 #address-cells = <1>;
343 #size-cells = <0>;
344 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
345 reg = <0 0xe6570000 0 0x428>;
348 power-domains = <&pd_a3sp>;
353 compatible = "renesas,scifb-r8a73a4", "renesas,scifb";
354 reg = <0 0xe6c20000 0 0x100>;
357 clock-names = "fck";
358 power-domains = <&pd_a3sp>;
363 compatible = "renesas,scifb-r8a73a4", "renesas,scifb";
364 reg = <0 0xe6c30000 0 0x100>;
367 clock-names = "fck";
368 power-domains = <&pd_a3sp>;
373 compatible = "renesas,scifa-r8a73a4", "renesas,scifa";
374 reg = <0 0xe6c40000 0 0x100>;
377 clock-names = "fck";
378 power-domains = <&pd_a3sp>;
383 compatible = "renesas,scifa-r8a73a4", "renesas,scifa";
384 reg = <0 0xe6c50000 0 0x100>;
387 clock-names = "fck";
388 power-domains = <&pd_a3sp>;
393 compatible = "renesas,scifb-r8a73a4", "renesas,scifb";
394 reg = <0 0xe6ce0000 0 0x100>;
397 clock-names = "fck";
398 power-domains = <&pd_a3sp>;
403 compatible = "renesas,scifb-r8a73a4", "renesas,scifb";
404 reg = <0 0xe6cf0000 0 0x100>;
407 clock-names = "fck";
408 power-domains = <&pd_c4>;
413 compatible = "renesas,sdhi-r8a73a4";
414 reg = <0 0xee100000 0 0x100>;
417 power-domains = <&pd_a3sp>;
418 cap-sd-highspeed;
423 compatible = "renesas,sdhi-r8a73a4";
424 reg = <0 0xee120000 0 0x100>;
427 power-domains = <&pd_a3sp>;
428 cap-sd-highspeed;
433 compatible = "renesas,sdhi-r8a73a4";
434 reg = <0 0xee140000 0 0x100>;
437 power-domains = <&pd_a3sp>;
438 cap-sd-highspeed;
443 compatible = "renesas,mmcif-r8a73a4", "renesas,sh-mmcif";
444 reg = <0 0xee200000 0 0x80>;
447 power-domains = <&pd_a3sp>;
448 reg-io-width = <4>;
453 compatible = "renesas,mmcif-r8a73a4", "renesas,sh-mmcif";
454 reg = <0 0xee220000 0 0x80>;
457 power-domains = <&pd_a3sp>;
458 reg-io-width = <4>;
462 gic: interrupt-controller@f1001000 {
463 compatible = "arm,gic-400";
464 #interrupt-cells = <3>;
465 #address-cells = <0>;
466 interrupt-controller;
467 reg = <0 0xf1001000 0 0x1000>,
473 clock-names = "clk";
474 power-domains = <&pd_c4>;
478 compatible = "renesas,bsc-r8a73a4", "renesas,bsc",
479 "simple-pm-bus";
480 #address-cells = <1>;
481 #size-cells = <1>;
483 reg = <0 0xfec10000 0 0x400>;
485 power-domains = <&pd_c4>;
489 #address-cells = <2>;
490 #size-cells = <2>;
495 compatible = "fixed-clock";
496 #clock-cells = <0>;
497 clock-frequency = <32768>;
500 compatible = "fixed-clock";
501 #clock-cells = <0>;
502 clock-frequency = <25000000>;
505 compatible = "fixed-clock";
506 #clock-cells = <0>;
507 clock-frequency = <48000000>;
510 compatible = "fixed-clock";
511 #clock-cells = <0>;
513 clock-frequency = <0>;
516 compatible = "fixed-clock";
517 #clock-cells = <0>;
519 clock-frequency = <0>;
524 compatible = "renesas,r8a73a4-cpg-clocks";
525 reg = <0 0xe6150000 0 0x10000>;
527 #clock-cells = <1>;
528 clock-output-names = "main", "pll0", "pll1", "pll2",
536 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
537 reg = <0 0xe6150010 0 4>;
540 #clock-cells = <0>;
541 clock-output-names = "zb";
544 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
545 reg = <0 0xe6150074 0 4>;
548 #clock-cells = <0>;
551 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
552 reg = <0 0xe6150078 0 4>;
555 #clock-cells = <0>;
558 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
559 reg = <0 0xe615007c 0 4>;
562 #clock-cells = <0>;
565 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
566 reg = <0 0xe6150240 0 4>;
569 #clock-cells = <0>;
572 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
573 reg = <0 0xe6150244 0 4>;
576 #clock-cells = <0>;
579 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
580 reg = <0 0xe6150008 0 4>;
584 #clock-cells = <0>;
587 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
588 reg = <0 0xe615000c 0 4>;
592 #clock-cells = <0>;
595 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
596 reg = <0 0xe615001c 0 4>;
600 #clock-cells = <0>;
603 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
604 reg = <0 0xe6150014 0 4>;
608 #clock-cells = <0>;
611 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
612 reg = <0 0xe6150034 0 4>;
616 #clock-cells = <0>;
619 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
620 reg = <0 0xe6150018 0 4>;
623 #clock-cells = <0>;
626 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
627 reg = <0 0xe6150090 0 4>;
630 #clock-cells = <0>;
633 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
634 reg = <0 0xe6150080 0 4>;
637 #clock-cells = <0>;
640 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
641 reg = <0 0xe6150098 0 4>;
643 #clock-cells = <0>;
646 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
647 reg = <0 0xe615026c 0 4>;
650 #clock-cells = <0>;
653 compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
654 reg = <0 0xe6150094 0 4>;
657 #clock-cells = <0>;
662 compatible = "fixed-factor-clock";
664 #clock-cells = <0>;
665 clock-div = <2>;
666 clock-mult = <1>;
669 compatible = "fixed-factor-clock";
671 #clock-cells = <0>;
672 clock-div = <2>;
673 clock-mult = <1>;
676 compatible = "fixed-factor-clock";
678 #clock-cells = <0>;
679 clock-div = <2>;
680 clock-mult = <1>;
683 compatible = "fixed-factor-clock";
685 #clock-cells = <0>;
686 clock-div = <2>;
687 clock-mult = <1>;
692 compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
693 reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>;
696 #clock-cells = <1>;
697 clock-indices = <
703 clock-output-names =
708 compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
709 reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
716 #clock-cells = <1>;
717 clock-indices = <
725 clock-output-names =
731 compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
732 reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
737 #clock-cells = <1>;
738 clock-indices = <
743 clock-output-names =
744 "irqc", "intc-sys", "iic5", "iic4", "iic3";
747 compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
748 reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
750 #clock-cells = <1>;
751 clock-indices = <
754 clock-output-names =
761 reg = <0 0xff000044 0 4>;
764 sysc: system-controller@e6180000 {
765 compatible = "renesas,sysc-r8a73a4", "renesas,sysc-rmobile";
766 reg = <0 0xe6180000 0 0x8000>, <0 0xe6188000 0 0x8000>;
768 pm-domains {
770 #address-cells = <1>;
771 #size-cells = <0>;
772 #power-domain-cells = <0>;
775 reg = <0>;
776 #address-cells = <1>;
777 #size-cells = <0>;
778 #power-domain-cells = <0>;
781 reg = <16>;
782 #power-domain-cells = <0>;
786 reg = <17>;
787 #power-domain-cells = <0>;
791 reg = <18>;
792 #address-cells = <1>;
793 #size-cells = <0>;
794 #power-domain-cells = <0>;
797 reg = <19>;
798 #power-domain-cells = <0>;
803 reg = <20>;
804 #address-cells = <1>;
805 #size-cells = <0>;
806 #power-domain-cells = <0>;
809 reg = <21>;
810 #power-domain-cells = <0>;
815 reg = <22>;
816 #address-cells = <1>;
817 #size-cells = <0>;
818 #power-domain-cells = <0>;
821 reg = <23>;
822 #power-domain-cells = <0>;
828 reg = <1>;
829 #power-domain-cells = <0>;
833 reg = <2>;
834 #power-domain-cells = <0>;
838 reg = <3>;
839 #power-domain-cells = <0>;
843 reg = <4>;
844 #address-cells = <1>;
845 #size-cells = <0>;
846 #power-domain-cells = <0>;
849 reg = <5>;
850 #power-domain-cells = <0>;
855 reg = <6>;
856 #power-domain-cells = <0>;
860 reg = <7>;
861 #power-domain-cells = <0>;
865 reg = <8>;
866 #address-cells = <1>;
867 #size-cells = <0>;
868 #power-domain-cells = <0>;
871 reg = <9>;
872 #power-domain-cells = <0>;
876 reg = <10>;
877 #power-domain-cells = <0>;
882 reg = <11>;
883 #power-domain-cells = <0>;
887 reg = <12>;
888 #address-cells = <1>;
889 #size-cells = <0>;
890 #power-domain-cells = <0>;
893 reg = <13>;
894 #power-domain-cells = <0>;
898 reg = <14>;
899 #power-domain-cells = <0>;