boot/dts/omap34xx-omap36xx-clocks.dtsi

1 // SPDX-License-Identifier: GPL-2.0-only
3  * Device Tree Source for OMAP34XX/OMAP36XX clock data
9 		#clock-cells = <0>;
10 		compatible = "fixed-factor-clock";
12 		clock-mult = <1>;
13 		clock-div = <1>;
17 		#clock-cells = <0>;
18 		compatible = "ti,omap3-interface-clock";
20 		ti,bit-shift = <3>;
25 		#clock-cells = <0>;
26 		compatible = "ti,omap3-interface-clock";
29 		ti,bit-shift = <2>;
33 		#clock-cells = <0>;
34 		compatible = "ti,omap3-interface-clock";
37 		ti,bit-shift = <1>;
41 		#clock-cells = <0>;
42 		compatible = "ti,omap3-interface-clock";
45 		ti,bit-shift = <0>;
49 		#clock-cells = <0>;
50 		compatible = "ti,gate-clock";
52 		ti,bit-shift = <0>;
54 		ti,set-rate-parent;
58 		#clock-cells = <0>;
59 		compatible = "ti,omap3-no-wait-interface-clock";
62 		ti,bit-shift = <0>;
66 		#clock-cells = <0>;
67 		compatible = "ti,gate-clock";
70 		ti,bit-shift = <1>;
74 		#clock-cells = <0>;
75 		compatible = "fixed-factor-clock";
77 		clock-mult = <1>;
78 		clock-div = <1>;
82 		#clock-cells = <0>;
83 		compatible = "ti,omap3-interface-clock";
86 		ti,bit-shift = <4>;
90 		#clock-cells = <0>;
91 		compatible = "ti,omap3-interface-clock";
94 		ti,bit-shift = <29>;
98 		#clock-cells = <0>;
99 		compatible = "ti,omap3-interface-clock";
102 		ti,bit-shift = <26>;
106 		#clock-cells = <0>;
107 		compatible = "ti,omap3-interface-clock";
110 		ti,bit-shift = <23>;
114 		#clock-cells = <0>;
115 		compatible = "ti,omap3-interface-clock";
118 		ti,bit-shift = <7>;
122 		#clock-cells = <0>;
123 		compatible = "fixed-factor-clock";
125 		clock-mult = <1>;
126 		clock-div = <1>;
130 		#clock-cells = <0>;
131 		compatible = "ti,wait-gate-clock";
134 		ti,bit-shift = <6>;
138 		#clock-cells = <0>;
139 		compatible = "ti,wait-gate-clock";
142 		ti,bit-shift = <7>;
146 		#clock-cells = <0>;
147 		compatible = "fixed-factor-clock";
149 		clock-mult = <1>;
150 		clock-div = <1>;
154 		#clock-cells = <0>;
155 		compatible = "ti,divider-clock";
157 		ti,bit-shift = <19>;
158 		ti,max-div = <7>;
160 		ti,index-starts-at-one;
164 		#clock-cells = <0>;
165 		compatible = "ti,omap3-dpll-clock";
168 		ti,low-power-stop;
170 		ti,low-power-bypass;
174 		#clock-cells = <0>;
175 		compatible = "ti,divider-clock";
177 		ti,max-div = <31>;
179 		ti,index-starts-at-one;
183 		#clock-cells = <0>;
184 		compatible = "ti,wait-gate-clock";
187 		ti,bit-shift = <0>;
191 		#clock-cells = <0>;
192 		compatible = "ti,omap3-interface-clock";
195 		ti,bit-shift = <31>;
199 		#clock-cells = <0>;
200 		compatible = "ti,omap3-interface-clock";
203 		ti,bit-shift = <3>;
207 		#clock-cells = <0>;
208 		compatible = "ti,omap3-interface-clock";
211 		ti,bit-shift = <3>;
215 		#clock-cells = <0>;
216 		compatible = "ti,wait-gate-clock";
219 		ti,bit-shift = <23>;