boot/dts/omap3430es1-clocks.dtsi

1 // SPDX-License-Identifier: GPL-2.0-only
9 		#clock-cells = <0>;
10 		compatible = "ti,wait-gate-clock";
12 		reg = <0x0b10>;
13 		ti,bit-shift = <0>;
17 		#clock-cells = <0>;
18 		compatible = "ti,divider-clock";
20 		ti,max-div = <7>;
21 		reg = <0x0b40>;
22 		ti,index-starts-at-one;
26 		#clock-cells = <0>;
27 		compatible = "fixed-factor-clock";
29 		clock-mult = <1>;
30 		clock-div = <1>;
34 		#clock-cells = <0>;
35 		compatible = "ti,wait-gate-clock";
37 		reg = <0x0b00>;
38 		ti,bit-shift = <1>;
42 		#clock-cells = <0>;
43 		compatible = "ti,wait-gate-clock";
45 		reg = <0x0b00>;
46 		ti,bit-shift = <2>;
50 		#clock-cells = <0>;
51 		compatible = "ti,wait-gate-clock";
53 		reg = <0x0a00>;
54 		ti,bit-shift = <3>;
58 		#clock-cells = <0>;
59 		compatible = "ti,wait-gate-clock";
61 		reg = <0x0a00>;
62 		ti,bit-shift = <5>;
66 		#clock-cells = <0>;
67 		compatible = "ti,composite-no-wait-gate-clock";
69 		ti,bit-shift = <0>;
70 		reg = <0x0a00>;
74 		#clock-cells = <0>;
75 		compatible = "ti,composite-divider-clock";
77 		ti,bit-shift = <8>;
78 		reg = <0x0a40>;
83 		#clock-cells = <0>;
84 		compatible = "ti,composite-clock";
89 		#clock-cells = <0>;
90 		compatible = "fixed-factor-clock";
92 		clock-mult = <1>;
93 		clock-div = <2>;
97 		#clock-cells = <0>;
98 		compatible = "ti,omap3-no-wait-interface-clock";
100 		reg = <0x0a10>;
101 		ti,bit-shift = <4>;
105 		#clock-cells = <0>;
106 		compatible = "ti,omap3-interface-clock";
108 		reg = <0x0a10>;
109 		ti,bit-shift = <8>;
113 		#clock-cells = <0>;
114 		compatible = "fixed-factor-clock";
116 		clock-mult = <1>;
117 		clock-div = <1>;
121 		#clock-cells = <0>;
122 		compatible = "ti,omap3-no-wait-interface-clock";
124 		reg = <0x0a10>;
125 		ti,bit-shift = <0>;
129 		#clock-cells = <0>;
130 		compatible = "ti,composite-interface-clock";
132 		ti,bit-shift = <5>;
133 		reg = <0x0a10>;
137 		#clock-cells = <0>;
138 		compatible = "ti,composite-divider-clock";
140 		ti,bit-shift = <4>;
141 		ti,max-div = <1>;
142 		reg = <0x0a40>;
143 		ti,index-starts-at-one;
147 		#clock-cells = <0>;
148 		compatible = "ti,composite-clock";
153 		#clock-cells = <0>;
154 		compatible = "ti,gate-clock";
156 		ti,bit-shift = <0>;
157 		reg = <0x0e00>;
158 		ti,set-rate-parent;
162 		#clock-cells = <0>;
163 		compatible = "ti,omap3-no-wait-interface-clock";
165 		reg = <0x0e10>;
166 		ti,bit-shift = <0>;