boot/dts/mmp3.dtsi

198 				clocks = <&soc_clocks MMP2_CLK_USB>;
216 				clocks = <&soc_clocks MMP2_CLK_USBHSIC0>;
237 				clocks = <&soc_clocks MMP2_CLK_USBHSIC1>;
250 				clocks = <&soc_clocks MMP2_CLK_SDH0>;
259 				clocks = <&soc_clocks MMP2_CLK_SDH1>;
268 				clocks = <&soc_clocks MMP2_CLK_SDH2>;
277 				clocks = <&soc_clocks MMP2_CLK_SDH3>;
286 				clocks = <&soc_clocks MMP3_CLK_SDH4>;
297 				clocks = <&soc_clocks MMP2_CLK_CCIC0>;
299 				power-domains = <&soc_clocks MMP3_POWER_DOMAIN_CAMERA>;
309 				clocks = <&soc_clocks MMP2_CLK_CCIC1>;
311 				power-domains = <&soc_clocks MMP3_POWER_DOMAIN_CAMERA>;
323 				clocks = <&soc_clocks MMP3_CLK_GPU_3D>,
324 					 <&soc_clocks MMP3_CLK_GPU_BUS>;
326 				power-domains = <&soc_clocks MMP2_POWER_DOMAIN_GPU>;
335 				clocks = <&soc_clocks MMP3_CLK_GPU_2D>,
336 					 <&soc_clocks MMP3_CLK_GPU_BUS>;
338 				power-domains = <&soc_clocks MMP2_POWER_DOMAIN_GPU>;
353 				clocks = <&soc_clocks MMP2_CLK_TIMER>;
360 				clocks = <&soc_clocks MMP2_CLK_UART0>;
361 				resets = <&soc_clocks MMP2_CLK_UART0>;
370 				clocks = <&soc_clocks MMP2_CLK_UART1>;
371 				resets = <&soc_clocks MMP2_CLK_UART1>;
380 				clocks = <&soc_clocks MMP2_CLK_UART2>;
381 				resets = <&soc_clocks MMP2_CLK_UART2>;
390 				clocks = <&soc_clocks MMP2_CLK_UART3>;
391 				resets = <&soc_clocks MMP2_CLK_UART3>;
405 				clocks = <&soc_clocks MMP2_CLK_GPIO>;
406 				resets = <&soc_clocks MMP2_CLK_GPIO>;
440 				clocks = <&soc_clocks MMP2_CLK_TWSI0>;
441 				resets = <&soc_clocks MMP2_CLK_TWSI0>;
453 				clocks = <&soc_clocks MMP2_CLK_TWSI1>;
454 				resets = <&soc_clocks MMP2_CLK_TWSI1>;
465 				clocks = <&soc_clocks MMP2_CLK_TWSI2>;
466 				resets = <&soc_clocks MMP2_CLK_TWSI2>;
477 				clocks = <&soc_clocks MMP2_CLK_TWSI3>;
478 				resets = <&soc_clocks MMP2_CLK_TWSI3>;
490 				clocks = <&soc_clocks MMP2_CLK_TWSI4>;
491 				resets = <&soc_clocks MMP2_CLK_TWSI4>;
502 				clocks = <&soc_clocks MMP2_CLK_TWSI5>;
503 				resets = <&soc_clocks MMP2_CLK_TWSI5>;
515 				clocks = <&soc_clocks MMP2_CLK_RTC>;
516 				resets = <&soc_clocks MMP2_CLK_RTC>;
523 				clocks = <&soc_clocks MMP2_CLK_SSP0>;
533 				clocks = <&soc_clocks MMP2_CLK_SSP1>;
543 				clocks = <&soc_clocks MMP2_CLK_SSP2>;
553 				clocks = <&soc_clocks MMP2_CLK_SSP3>;
568 		soc_clocks: clocks@d4050000 {  label