boot/dts/mmp2.dtsi

47 				clocks = <&soc_clocks MMP2_CLK_GPU_3D>,
48 					 <&soc_clocks MMP2_CLK_GPU_BUS>;
50 				power-domains = <&soc_clocks MMP2_POWER_DOMAIN_GPU>;
143 				clocks = <&soc_clocks MMP2_CLK_USB>;
153 				clocks = <&soc_clocks MMP2_CLK_SDH0>;
162 				clocks = <&soc_clocks MMP2_CLK_SDH1>;
171 				clocks = <&soc_clocks MMP2_CLK_SDH2>;
180 				clocks = <&soc_clocks MMP2_CLK_SDH3>;
190 				clocks = <&soc_clocks MMP2_CLK_CCIC0>;
201 				clocks = <&soc_clocks MMP2_CLK_CCIC1>;
230 				clocks = <&soc_clocks MMP2_CLK_AUDIO>,
231 					 <&soc_clocks MMP2_CLK_VCTCXO>,
232 					 <&soc_clocks MMP2_CLK_I2S0>,
233 					 <&soc_clocks MMP2_CLK_I2S1>;
234 				power-domains = <&soc_clocks MMP2_POWER_DOMAIN_AUDIO>;
245 				clocks = <&soc_clocks MMP2_CLK_AUDIO>,
247 				power-domains = <&soc_clocks MMP2_POWER_DOMAIN_AUDIO>;
258 				clocks = <&soc_clocks MMP2_CLK_AUDIO>,
260 				power-domains = <&soc_clocks MMP2_POWER_DOMAIN_AUDIO>;
285 				clocks = <&soc_clocks MMP2_CLK_TIMER>;
292 				clocks = <&soc_clocks MMP2_CLK_UART0>;
293 				resets = <&soc_clocks MMP2_CLK_UART0>;
302 				clocks = <&soc_clocks MMP2_CLK_UART1>;
303 				resets = <&soc_clocks MMP2_CLK_UART1>;
312 				clocks = <&soc_clocks MMP2_CLK_UART2>;
313 				resets = <&soc_clocks MMP2_CLK_UART2>;
322 				clocks = <&soc_clocks MMP2_CLK_UART3>;
323 				resets = <&soc_clocks MMP2_CLK_UART3>;
337 				clocks = <&soc_clocks MMP2_CLK_GPIO>;
338 				resets = <&soc_clocks MMP2_CLK_GPIO>;
372 				clocks = <&soc_clocks MMP2_CLK_TWSI0>;
373 				resets = <&soc_clocks MMP2_CLK_TWSI0>;
385 				clocks = <&soc_clocks MMP2_CLK_TWSI1>;
386 				resets = <&soc_clocks MMP2_CLK_TWSI1>;
397 				clocks = <&soc_clocks MMP2_CLK_TWSI2>;
398 				resets = <&soc_clocks MMP2_CLK_TWSI2>;
409 				clocks = <&soc_clocks MMP2_CLK_TWSI3>;
410 				resets = <&soc_clocks MMP2_CLK_TWSI3>;
422 				clocks = <&soc_clocks MMP2_CLK_TWSI4>;
423 				resets = <&soc_clocks MMP2_CLK_TWSI4>;
434 				clocks = <&soc_clocks MMP2_CLK_TWSI5>;
435 				resets = <&soc_clocks MMP2_CLK_TWSI5>;
447 				clocks = <&soc_clocks MMP2_CLK_RTC>;
448 				resets = <&soc_clocks MMP2_CLK_RTC>;
455 				clocks = <&soc_clocks MMP2_CLK_SSP0>;
465 				clocks = <&soc_clocks MMP2_CLK_SSP1>;
475 				clocks = <&soc_clocks MMP2_CLK_SSP2>;
485 				clocks = <&soc_clocks MMP2_CLK_SSP3>;
502 		soc_clocks: clocks {  label