Lines Matching +full:reg +full:- +full:names
1 // SPDX-License-Identifier: GPL-2.0
14 #include <dt-bindings/clock/exynos5420.h>
15 #include <dt-bindings/clock/exynos-audss-clk.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
42 * by exynos5420-cpus.dtsi or exynos5422-cpus.dtsi.
46 compatible = "operating-points-v2";
47 opp-shared;
49 opp-1800000000 {
50 opp-hz = /bits/ 64 <1800000000>;
51 opp-microvolt = <1250000 1250000 1500000>;
52 clock-latency-ns = <140000>;
54 opp-1700000000 {
55 opp-hz = /bits/ 64 <1700000000>;
56 opp-microvolt = <1212500 1212500 1500000>;
57 clock-latency-ns = <140000>;
59 opp-1600000000 {
60 opp-hz = /bits/ 64 <1600000000>;
61 opp-microvolt = <1175000 1175000 1500000>;
62 clock-latency-ns = <140000>;
64 opp-1500000000 {
65 opp-hz = /bits/ 64 <1500000000>;
66 opp-microvolt = <1137500 1137500 1500000>;
67 clock-latency-ns = <140000>;
69 opp-1400000000 {
70 opp-hz = /bits/ 64 <1400000000>;
71 opp-microvolt = <1112500 1112500 1500000>;
72 clock-latency-ns = <140000>;
74 opp-1300000000 {
75 opp-hz = /bits/ 64 <1300000000>;
76 opp-microvolt = <1062500 1062500 1500000>;
77 clock-latency-ns = <140000>;
79 opp-1200000000 {
80 opp-hz = /bits/ 64 <1200000000>;
81 opp-microvolt = <1037500 1037500 1500000>;
82 clock-latency-ns = <140000>;
84 opp-1100000000 {
85 opp-hz = /bits/ 64 <1100000000>;
86 opp-microvolt = <1012500 1012500 1500000>;
87 clock-latency-ns = <140000>;
89 opp-1000000000 {
90 opp-hz = /bits/ 64 <1000000000>;
91 opp-microvolt = < 987500 987500 1500000>;
92 clock-latency-ns = <140000>;
94 opp-900000000 {
95 opp-hz = /bits/ 64 <900000000>;
96 opp-microvolt = < 962500 962500 1500000>;
97 clock-latency-ns = <140000>;
99 opp-800000000 {
100 opp-hz = /bits/ 64 <800000000>;
101 opp-microvolt = < 937500 937500 1500000>;
102 clock-latency-ns = <140000>;
104 opp-700000000 {
105 opp-hz = /bits/ 64 <700000000>;
106 opp-microvolt = < 912500 912500 1500000>;
107 clock-latency-ns = <140000>;
112 compatible = "operating-points-v2";
113 opp-shared;
115 opp-1300000000 {
116 opp-hz = /bits/ 64 <1300000000>;
117 opp-microvolt = <1275000>;
118 clock-latency-ns = <140000>;
120 opp-1200000000 {
121 opp-hz = /bits/ 64 <1200000000>;
122 opp-microvolt = <1212500>;
123 clock-latency-ns = <140000>;
125 opp-1100000000 {
126 opp-hz = /bits/ 64 <1100000000>;
127 opp-microvolt = <1162500>;
128 clock-latency-ns = <140000>;
130 opp-1000000000 {
131 opp-hz = /bits/ 64 <1000000000>;
132 opp-microvolt = <1112500>;
133 clock-latency-ns = <140000>;
135 opp-900000000 {
136 opp-hz = /bits/ 64 <900000000>;
137 opp-microvolt = <1062500>;
138 clock-latency-ns = <140000>;
140 opp-800000000 {
141 opp-hz = /bits/ 64 <800000000>;
142 opp-microvolt = <1025000>;
143 clock-latency-ns = <140000>;
145 opp-700000000 {
146 opp-hz = /bits/ 64 <700000000>;
147 opp-microvolt = <975000>;
148 clock-latency-ns = <140000>;
150 opp-600000000 {
151 opp-hz = /bits/ 64 <600000000>;
152 opp-microvolt = <937500>;
153 clock-latency-ns = <140000>;
159 compatible = "arm,cci-400";
160 #address-cells = <1>;
161 #size-cells = <1>;
162 reg = <0x10d20000 0x1000>;
165 cci_control0: slave-if@4000 {
166 compatible = "arm,cci-400-ctrl-if";
167 interface-type = "ace";
168 reg = <0x4000 0x1000>;
170 cci_control1: slave-if@5000 {
171 compatible = "arm,cci-400-ctrl-if";
172 interface-type = "ace";
173 reg = <0x5000 0x1000>;
177 clock: clock-controller@10010000 {
178 compatible = "samsung,exynos5420-clock", "syscon";
179 reg = <0x10010000 0x30000>;
180 #clock-cells = <1>;
183 clock_audss: audss-clock-controller@3810000 {
184 compatible = "samsung,exynos5420-audss-clock";
185 reg = <0x03810000 0x0C>;
186 #clock-cells = <1>;
189 clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
190 power-domains = <&mau_pd>;
194 compatible = "samsung,mfc-v7";
195 reg = <0x11000000 0x10000>;
198 clock-names = "mfc";
199 power-domains = <&mfc_pd>;
201 iommu-names = "left", "right";
205 compatible = "samsung,exynos5420-dw-mshc-smu";
207 #address-cells = <1>;
208 #size-cells = <0>;
209 reg = <0x12200000 0x2000>;
211 clock-names = "biu", "ciu";
212 fifo-depth = <0x40>;
217 compatible = "samsung,exynos5420-dw-mshc-smu";
219 #address-cells = <1>;
220 #size-cells = <0>;
221 reg = <0x12210000 0x2000>;
223 clock-names = "biu", "ciu";
224 fifo-depth = <0x40>;
229 compatible = "samsung,exynos5420-dw-mshc";
231 #address-cells = <1>;
232 #size-cells = <0>;
233 reg = <0x12220000 0x1000>;
235 clock-names = "biu", "ciu";
236 fifo-depth = <0x40>;
240 dmc: memory-controller@10c20000 {
241 compatible = "samsung,exynos5422-dmc";
242 reg = <0x10c20000 0x10000>, <0x10c30000 0x10000>;
243 interrupt-parent = <&combiner>;
245 interrupt-names = "drex_0", "drex_1";
254 clock-names = "fout_spll",
262 samsung,syscon-clk = <&clock>;
267 compatible = "samsung,exynos5420-nocp";
268 reg = <0x10CA1000 0x200>;
273 compatible = "samsung,exynos5420-nocp";
274 reg = <0x10CA1400 0x200>;
279 compatible = "samsung,exynos5420-nocp";
280 reg = <0x10CA1800 0x200>;
285 compatible = "samsung,exynos5420-nocp";
286 reg = <0x10CA1C00 0x200>;
291 compatible = "samsung,exynos5420-nocp";
292 reg = <0x11A51000 0x200>;
297 compatible = "samsung,exynos5420-nocp";
298 reg = <0x11A51400 0x200>;
303 compatible = "samsung,exynos-ppmu";
304 reg = <0x10d00000 0x2000>;
306 clock-names = "ppmu";
308 ppmu_event3_dmc0_0: ppmu-event3-dmc0_0 {
309 event-name = "ppmu-event3-dmc0_0";
315 compatible = "samsung,exynos-ppmu";
316 reg = <0x10d10000 0x2000>;
318 clock-names = "ppmu";
320 ppmu_event3_dmc0_1: ppmu-event3-dmc0_1 {
321 event-name = "ppmu-event3-dmc0_1";
327 compatible = "samsung,exynos-ppmu";
328 reg = <0x10d60000 0x2000>;
330 clock-names = "ppmu";
332 ppmu_event3_dmc1_0: ppmu-event3-dmc1_0 {
333 event-name = "ppmu-event3-dmc1_0";
339 compatible = "samsung,exynos-ppmu";
340 reg = <0x10d70000 0x2000>;
342 clock-names = "ppmu";
344 ppmu_event3_dmc1_1: ppmu-event3-dmc1_1 {
345 event-name = "ppmu-event3-dmc1_1";
350 gsc_pd: power-domain@10044000 {
351 compatible = "samsung,exynos4210-pd";
352 reg = <0x10044000 0x20>;
353 #power-domain-cells = <0>;
357 isp_pd: power-domain@10044020 {
358 compatible = "samsung,exynos4210-pd";
359 reg = <0x10044020 0x20>;
360 #power-domain-cells = <0>;
364 mfc_pd: power-domain@10044060 {
365 compatible = "samsung,exynos4210-pd";
366 reg = <0x10044060 0x20>;
367 #power-domain-cells = <0>;
371 g3d_pd: power-domain@10044080 {
372 compatible = "samsung,exynos4210-pd";
373 reg = <0x10044080 0x20>;
374 #power-domain-cells = <0>;
378 disp_pd: power-domain@100440c0 {
379 compatible = "samsung,exynos4210-pd";
380 reg = <0x100440C0 0x20>;
381 #power-domain-cells = <0>;
385 mau_pd: power-domain@100440e0 {
386 compatible = "samsung,exynos4210-pd";
387 reg = <0x100440E0 0x20>;
388 #power-domain-cells = <0>;
392 msc_pd: power-domain@10044120 {
393 compatible = "samsung,exynos4210-pd";
394 reg = <0x10044120 0x20>;
395 #power-domain-cells = <0>;
400 compatible = "samsung,exynos5420-pinctrl";
401 reg = <0x13400000 0x1000>;
404 wakeup-interrupt-controller {
405 compatible = "samsung,exynos4210-wakeup-eint";
406 interrupt-parent = <&gic>;
412 compatible = "samsung,exynos5420-pinctrl";
413 reg = <0x13410000 0x1000>;
418 compatible = "samsung,exynos5420-pinctrl";
419 reg = <0x14000000 0x1000>;
424 compatible = "samsung,exynos5420-pinctrl";
425 reg = <0x14010000 0x1000>;
430 compatible = "samsung,exynos5420-pinctrl";
431 reg = <0x03860000 0x1000>;
433 power-domains = <&mau_pd>;
438 reg = <0x03880000 0x1000>;
441 clock-names = "apb_pclk";
442 #dma-cells = <1>;
443 #dma-channels = <6>;
444 #dma-requests = <16>;
445 power-domains = <&mau_pd>;
450 reg = <0x121A0000 0x1000>;
453 clock-names = "apb_pclk";
454 #dma-cells = <1>;
455 #dma-channels = <8>;
456 #dma-requests = <32>;
461 reg = <0x121B0000 0x1000>;
464 clock-names = "apb_pclk";
465 #dma-cells = <1>;
466 #dma-channels = <8>;
467 #dma-requests = <32>;
472 reg = <0x10800000 0x1000>;
475 clock-names = "apb_pclk";
476 #dma-cells = <1>;
477 #dma-channels = <8>;
478 #dma-requests = <1>;
483 reg = <0x11C10000 0x1000>;
486 clock-names = "apb_pclk";
487 #dma-cells = <1>;
488 #dma-channels = <8>;
489 #dma-requests = <1>;
491 * MDMA1 can support both secure and non-secure
501 compatible = "samsung,exynos5420-i2s";
502 reg = <0x03830000 0x100>;
506 dma-names = "tx", "rx", "tx-sec";
510 clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
511 #clock-cells = <1>;
512 clock-output-names = "i2s_cdclk0";
513 #sound-dai-cells = <1>;
514 samsung,idma-addr = <0x03000000>;
515 pinctrl-names = "default";
516 pinctrl-0 = <&i2s0_bus>;
517 power-domains = <&mau_pd>;
522 compatible = "samsung,exynos5420-i2s";
523 reg = <0x12D60000 0x100>;
526 dma-names = "tx", "rx";
528 clock-names = "iis", "i2s_opclk0";
529 #clock-cells = <1>;
530 clock-output-names = "i2s_cdclk1";
531 #sound-dai-cells = <1>;
532 pinctrl-names = "default";
533 pinctrl-0 = <&i2s1_bus>;
538 compatible = "samsung,exynos5420-i2s";
539 reg = <0x12D70000 0x100>;
542 dma-names = "tx", "rx";
544 clock-names = "iis", "i2s_opclk0";
545 #clock-cells = <1>;
546 clock-output-names = "i2s_cdclk2";
547 #sound-dai-cells = <1>;
548 pinctrl-names = "default";
549 pinctrl-0 = <&i2s2_bus>;
554 compatible = "samsung,exynos4210-spi";
555 reg = <0x12d20000 0x100>;
559 dma-names = "tx", "rx";
560 #address-cells = <1>;
561 #size-cells = <0>;
562 pinctrl-names = "default";
563 pinctrl-0 = <&spi0_bus>;
565 clock-names = "spi", "spi_busclk0";
570 compatible = "samsung,exynos4210-spi";
571 reg = <0x12d30000 0x100>;
575 dma-names = "tx", "rx";
576 #address-cells = <1>;
577 #size-cells = <0>;
578 pinctrl-names = "default";
579 pinctrl-0 = <&spi1_bus>;
581 clock-names = "spi", "spi_busclk0";
586 compatible = "samsung,exynos4210-spi";
587 reg = <0x12d40000 0x100>;
591 dma-names = "tx", "rx";
592 #address-cells = <1>;
593 #size-cells = <0>;
594 pinctrl-names = "default";
595 pinctrl-0 = <&spi2_bus>;
597 clock-names = "spi", "spi_busclk0";
601 dp_phy: dp-video-phy {
602 compatible = "samsung,exynos5420-dp-video-phy";
603 samsung,pmu-syscon = <&pmu_system_controller>;
604 #phy-cells = <0>;
607 mipi_phy: mipi-video-phy {
608 compatible = "samsung,s5pv210-mipi-video-phy";
610 #phy-cells = <1>;
614 compatible = "samsung,exynos5410-mipi-dsi";
615 reg = <0x14500000 0x10000>;
618 phy-names = "dsim";
620 clock-names = "bus_clk", "pll_clk";
621 #address-cells = <1>;
622 #size-cells = <0>;
627 compatible = "samsung,exynos5250-hsi2c";
628 reg = <0x12E00000 0x1000>;
630 #address-cells = <1>;
631 #size-cells = <0>;
632 pinctrl-names = "default";
633 pinctrl-0 = <&i2c8_hs_bus>;
635 clock-names = "hsi2c";
640 compatible = "samsung,exynos5250-hsi2c";
641 reg = <0x12E10000 0x1000>;
643 #address-cells = <1>;
644 #size-cells = <0>;
645 pinctrl-names = "default";
646 pinctrl-0 = <&i2c9_hs_bus>;
648 clock-names = "hsi2c";
653 compatible = "samsung,exynos5250-hsi2c";
654 reg = <0x12E20000 0x1000>;
656 #address-cells = <1>;
657 #size-cells = <0>;
658 pinctrl-names = "default";
659 pinctrl-0 = <&i2c10_hs_bus>;
661 clock-names = "hsi2c";
666 compatible = "samsung,exynos5420-hdmi";
667 reg = <0x14530000 0x70000>;
672 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
675 samsung,syscon-phandle = <&pmu_system_controller>;
677 power-domains = <&disp_pd>;
678 #sound-dai-cells = <0>;
682 reg = <0x145D0000 0x20>;
686 compatible = "samsung,s5p-cec";
687 reg = <0x101B0000 0x200>;
690 clock-names = "hdmicec";
691 samsung,syscon-phandle = <&pmu_system_controller>;
692 hdmi-phandle = <&hdmi>;
693 pinctrl-names = "default";
694 pinctrl-0 = <&hdmi_cec>;
699 compatible = "samsung,exynos5420-mixer";
700 reg = <0x14450000 0x10000>;
704 clock-names = "mixer", "hdmi", "sclk_hdmi";
705 power-domains = <&disp_pd>;
711 compatible = "samsung,exynos5250-rotator";
712 reg = <0x11C00000 0x64>;
715 clock-names = "rotator";
719 gsc_0: video-scaler@13e00000 {
720 compatible = "samsung,exynos5420-gsc", "samsung,exynos5-gsc";
721 reg = <0x13e00000 0x1000>;
724 clock-names = "gscl";
725 power-domains = <&gsc_pd>;
729 gsc_1: video-scaler@13e10000 {
730 compatible = "samsung,exynos5420-gsc", "samsung,exynos5-gsc";
731 reg = <0x13e10000 0x1000>;
734 clock-names = "gscl";
735 power-domains = <&gsc_pd>;
740 compatible = "samsung,exynos5420-mali", "arm,mali-t628";
741 reg = <0x11800000 0x5000>;
745 interrupt-names = "job", "mmu", "gpu";
748 clock-names = "core";
749 power-domains = <&g3d_pd>;
750 operating-points-v2 = <&gpu_opp_table>;
753 #cooling-cells = <2>;
755 gpu_opp_table: opp-table {
756 compatible = "operating-points-v2";
758 opp-177000000 {
759 opp-hz = /bits/ 64 <177000000>;
760 opp-microvolt = <812500>;
762 opp-266000000 {
763 opp-hz = /bits/ 64 <266000000>;
764 opp-microvolt = <862500>;
766 opp-350000000 {
767 opp-hz = /bits/ 64 <350000000>;
768 opp-microvolt = <912500>;
770 opp-420000000 {
771 opp-hz = /bits/ 64 <420000000>;
772 opp-microvolt = <962500>;
774 opp-480000000 {
775 opp-hz = /bits/ 64 <480000000>;
776 opp-microvolt = <1000000>;
778 opp-543000000 {
779 opp-hz = /bits/ 64 <543000000>;
780 opp-microvolt = <1037500>;
782 opp-600000000 {
783 opp-hz = /bits/ 64 <600000000>;
784 opp-microvolt = <1150000>;
790 compatible = "samsung,exynos5420-scaler";
791 reg = <0x12800000 0x1294>;
794 clock-names = "mscl";
795 power-domains = <&msc_pd>;
800 compatible = "samsung,exynos5420-scaler";
801 reg = <0x12810000 0x1294>;
804 clock-names = "mscl";
805 power-domains = <&msc_pd>;
810 compatible = "samsung,exynos5420-scaler";
811 reg = <0x12820000 0x1294>;
814 clock-names = "mscl";
815 power-domains = <&msc_pd>;
820 compatible = "samsung,exynos5420-jpeg";
821 reg = <0x11F50000 0x1000>;
823 clock-names = "jpeg";
829 compatible = "samsung,exynos5420-jpeg";
830 reg = <0x11F60000 0x1000>;
832 clock-names = "jpeg";
837 pmu_system_controller: system-controller@10040000 {
838 compatible = "samsung,exynos5420-pmu", "syscon";
839 reg = <0x10040000 0x5000>;
840 clock-names = "clkout16";
842 #clock-cells = <1>;
843 interrupt-controller;
844 #interrupt-cells = <3>;
845 interrupt-parent = <&gic>;
849 compatible = "samsung,exynos5420-tmu";
850 reg = <0x10060000 0x100>;
853 clock-names = "tmu_apbif";
854 #thermal-sensor-cells = <0>;
858 compatible = "samsung,exynos5420-tmu";
859 reg = <0x10064000 0x100>;
862 clock-names = "tmu_apbif";
863 #thermal-sensor-cells = <0>;
867 compatible = "samsung,exynos5420-tmu-ext-triminfo";
868 reg = <0x10068000 0x100>, <0x1006c000 0x4>;
871 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
872 #thermal-sensor-cells = <0>;
876 compatible = "samsung,exynos5420-tmu-ext-triminfo";
877 reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
880 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
881 #thermal-sensor-cells = <0>;
885 compatible = "samsung,exynos5420-tmu-ext-triminfo";
886 reg = <0x100a0000 0x100>, <0x10068000 0x4>;
889 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
890 #thermal-sensor-cells = <0>;
894 compatible = "samsung,exynos-sysmmu";
895 reg = <0x10A60000 0x1000>;
896 interrupt-parent = <&combiner>;
898 clock-names = "sysmmu", "master";
900 #iommu-cells = <0>;
904 compatible = "samsung,exynos-sysmmu";
905 reg = <0x10A70000 0x1000>;
906 interrupt-parent = <&combiner>;
908 clock-names = "sysmmu", "master";
910 #iommu-cells = <0>;
914 compatible = "samsung,exynos-sysmmu";
915 reg = <0x14650000 0x1000>;
916 interrupt-parent = <&combiner>;
918 clock-names = "sysmmu", "master";
920 power-domains = <&disp_pd>;
921 #iommu-cells = <0>;
925 compatible = "samsung,exynos-sysmmu";
926 reg = <0x13E80000 0x1000>;
927 interrupt-parent = <&combiner>;
929 clock-names = "sysmmu", "master";
931 power-domains = <&gsc_pd>;
932 #iommu-cells = <0>;
936 compatible = "samsung,exynos-sysmmu";
937 reg = <0x13E90000 0x1000>;
938 interrupt-parent = <&combiner>;
940 clock-names = "sysmmu", "master";
942 power-domains = <&gsc_pd>;
943 #iommu-cells = <0>;
947 compatible = "samsung,exynos-sysmmu";
948 reg = <0x12880000 0x1000>;
949 interrupt-parent = <&combiner>;
951 clock-names = "sysmmu", "master";
953 power-domains = <&msc_pd>;
954 #iommu-cells = <0>;
958 compatible = "samsung,exynos-sysmmu";
959 reg = <0x12890000 0x1000>;
961 clock-names = "sysmmu", "master";
963 power-domains = <&msc_pd>;
964 #iommu-cells = <0>;
968 compatible = "samsung,exynos-sysmmu";
969 reg = <0x128A0000 0x1000>;
971 clock-names = "sysmmu", "master";
973 power-domains = <&msc_pd>;
974 #iommu-cells = <0>;
978 compatible = "samsung,exynos-sysmmu";
979 reg = <0x128C0000 0x1000>;
980 interrupt-parent = <&combiner>;
982 clock-names = "sysmmu", "master";
984 power-domains = <&msc_pd>;
985 #iommu-cells = <0>;
989 compatible = "samsung,exynos-sysmmu";
990 reg = <0x128D0000 0x1000>;
991 interrupt-parent = <&combiner>;
993 clock-names = "sysmmu", "master";
995 power-domains = <&msc_pd>;
996 #iommu-cells = <0>;
1000 compatible = "samsung,exynos-sysmmu";
1001 reg = <0x128E0000 0x1000>;
1002 interrupt-parent = <&combiner>;
1004 clock-names = "sysmmu", "master";
1006 power-domains = <&msc_pd>;
1007 #iommu-cells = <0>;
1011 compatible = "samsung,exynos-sysmmu";
1012 reg = <0x11D40000 0x1000>;
1013 interrupt-parent = <&combiner>;
1015 clock-names = "sysmmu", "master";
1017 #iommu-cells = <0>;
1021 compatible = "samsung,exynos-sysmmu";
1022 reg = <0x11F10000 0x1000>;
1023 interrupt-parent = <&combiner>;
1025 clock-names = "sysmmu", "master";
1027 #iommu-cells = <0>;
1031 compatible = "samsung,exynos-sysmmu";
1032 reg = <0x11F20000 0x1000>;
1034 clock-names = "sysmmu", "master";
1036 #iommu-cells = <0>;
1040 compatible = "samsung,exynos-sysmmu";
1041 reg = <0x11200000 0x1000>;
1042 interrupt-parent = <&combiner>;
1044 clock-names = "sysmmu", "master";
1046 power-domains = <&mfc_pd>;
1047 #iommu-cells = <0>;
1051 compatible = "samsung,exynos-sysmmu";
1052 reg = <0x11210000 0x1000>;
1053 interrupt-parent = <&combiner>;
1055 clock-names = "sysmmu", "master";
1057 power-domains = <&mfc_pd>;
1058 #iommu-cells = <0>;
1062 compatible = "samsung,exynos-sysmmu";
1063 reg = <0x14640000 0x1000>;
1064 interrupt-parent = <&combiner>;
1066 clock-names = "sysmmu", "master";
1068 power-domains = <&disp_pd>;
1069 #iommu-cells = <0>;
1073 compatible = "samsung,exynos-sysmmu";
1074 reg = <0x14680000 0x1000>;
1075 interrupt-parent = <&combiner>;
1077 clock-names = "sysmmu", "master";
1079 power-domains = <&disp_pd>;
1080 #iommu-cells = <0>;
1084 compatible = "samsung,exynos-bus";
1086 clock-names = "bus";
1091 compatible = "samsung,exynos-bus";
1093 clock-names = "bus";
1098 compatible = "samsung,exynos-bus";
1100 clock-names = "bus";
1105 compatible = "samsung,exynos-bus";
1107 clock-names = "bus";
1112 compatible = "samsung,exynos-bus";
1114 clock-names = "bus";
1119 compatible = "samsung,exynos-bus";
1121 clock-names = "bus";
1126 compatible = "samsung,exynos-bus";
1128 clock-names = "bus";
1133 compatible = "samsung,exynos-bus";
1135 clock-names = "bus";
1140 compatible = "samsung,exynos-bus";
1142 clock-names = "bus";
1147 compatible = "samsung,exynos-bus";
1149 clock-names = "bus";
1154 compatible = "samsung,exynos-bus";
1156 clock-names = "bus";
1161 compatible = "samsung,exynos-bus";
1163 clock-names = "bus";
1168 compatible = "samsung,exynos-bus";
1170 clock-names = "bus";
1175 compatible = "samsung,exynos-bus";
1177 clock-names = "bus";
1182 compatible = "samsung,exynos-bus";
1184 clock-names = "bus";
1189 compatible = "samsung,exynos-bus";
1191 clock-names = "bus";
1196 thermal-zones {
1197 cpu0_thermal: cpu0-thermal {
1198 thermal-sensors = <&tmu_cpu0>;
1199 #include "exynos5420-trip-points.dtsi"
1201 cpu1_thermal: cpu1-thermal {
1202 thermal-sensors = <&tmu_cpu1>;
1203 #include "exynos5420-trip-points.dtsi"
1205 cpu2_thermal: cpu2-thermal {
1206 thermal-sensors = <&tmu_cpu2>;
1207 #include "exynos5420-trip-points.dtsi"
1209 cpu3_thermal: cpu3-thermal {
1210 thermal-sensors = <&tmu_cpu3>;
1211 #include "exynos5420-trip-points.dtsi"
1213 gpu_thermal: gpu-thermal {
1214 thermal-sensors = <&tmu_gpu>;
1215 #include "exynos5420-trip-points.dtsi"
1222 clock-names = "adc";
1223 samsung,syscon-phandle = <&pmu_system_controller>;
1228 clock-names = "dp";
1230 phy-names = "dp";
1231 power-domains = <&disp_pd>;
1235 compatible = "samsung,exynos5420-fimd";
1237 clock-names = "sclk_fimd", "fimd";
1238 power-domains = <&disp_pd>;
1240 iommu-names = "m0", "m1";
1246 clock-names = "fimg2d";
1252 clock-names = "i2c";
1253 pinctrl-names = "default";
1254 pinctrl-0 = <&i2c0_bus>;
1259 clock-names = "i2c";
1260 pinctrl-names = "default";
1261 pinctrl-0 = <&i2c1_bus>;
1266 clock-names = "i2c";
1267 pinctrl-names = "default";
1268 pinctrl-0 = <&i2c2_bus>;
1273 clock-names = "i2c";
1274 pinctrl-names = "default";
1275 pinctrl-0 = <&i2c3_bus>;
1280 clock-names = "hsi2c";
1281 pinctrl-names = "default";
1282 pinctrl-0 = <&i2c4_hs_bus>;
1287 clock-names = "hsi2c";
1288 pinctrl-names = "default";
1289 pinctrl-0 = <&i2c5_hs_bus>;
1294 clock-names = "hsi2c";
1295 pinctrl-names = "default";
1296 pinctrl-0 = <&i2c6_hs_bus>;
1301 clock-names = "hsi2c";
1302 pinctrl-names = "default";
1303 pinctrl-0 = <&i2c7_hs_bus>;
1308 clock-names = "fin_pll", "mct";
1313 clock-names = "secss";
1318 clock-names = "timers";
1323 clock-names = "rtc";
1324 interrupt-parent = <&pmu_system_controller>;
1330 clock-names = "uart", "clk_uart_baud0";
1332 dma-names = "rx", "tx";
1337 clock-names = "uart", "clk_uart_baud0";
1339 dma-names = "rx", "tx";
1344 clock-names = "uart", "clk_uart_baud0";
1346 dma-names = "rx", "tx";
1351 clock-names = "uart", "clk_uart_baud0";
1353 dma-names = "rx", "tx";
1358 clock-names = "secss";
1363 clock-names = "secss";
1368 clock-names = "usbdrd30";
1373 clock-names = "phy", "ref";
1374 samsung,pmu-syscon = <&pmu_system_controller>;
1379 clock-names = "usbdrd30";
1388 clock-names = "phy", "ref";
1389 samsung,pmu-syscon = <&pmu_system_controller>;
1394 clock-names = "usbhost";
1399 clock-names = "usbhost";
1404 clock-names = "phy", "ref";
1405 samsung,sysreg-phandle = <&sysreg_system_controller>;
1406 samsung,pmureg-phandle = <&pmu_system_controller>;
1411 clock-names = "watchdog";
1412 samsung,syscon-phandle = <&pmu_system_controller>;
1415 #include "exynos5420-pinctrl.dtsi"
1416 #include "exynos-syscon-restart.dtsi"