boot/dts/exynos5.dtsi

1 // SPDX-License-Identifier: GPL-2.0
5  * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
17 	interrupt-parent = <&gic>;
18 	#address-cells = <1>;
19 	#size-cells = <1>;
33 		compatible = "simple-bus";
34 		#address-cells = <1>;
35 		#size-cells = <1>;
39 			compatible = "samsung,exynos4210-chipid";
40 			reg = <0x10000000 0x100>;
43 		sromc: memory-controller@12250000 {
44 			compatible = "samsung,exynos4210-srom";
45 			reg = <0x12250000 0x14>;
48 		combiner: interrupt-controller@10440000 {
49 			compatible = "samsung,exynos4210-combiner";
50 			#interrupt-cells = <2>;
51 			interrupt-controller;
52 			samsung,combiner-nr = <32>;
53 			reg = <0x10440000 0x1000>;
88 		gic: interrupt-controller@10481000 {
89 			compatible = "arm,gic-400", "arm,cortex-a15-gic";
90 			#interrupt-cells = <3>;
91 			interrupt-controller;
92 			reg =	<0x10481000 0x1000>,
101 			compatible = "samsung,exynos5-sysreg", "syscon";
102 			reg = <0x10050000 0x5000>;
106 			compatible = "samsung,exynos4210-uart";
107 			reg = <0x12C00000 0x100>;
112 			compatible = "samsung,exynos4210-uart";
113 			reg = <0x12C10000 0x100>;
118 			compatible = "samsung,exynos4210-uart";
119 			reg = <0x12C20000 0x100>;
124 			compatible = "samsung,exynos4210-uart";
125 			reg = <0x12C30000 0x100>;
130 			compatible = "samsung,s3c2440-i2c";
131 			reg = <0x12C60000 0x100>;
133 			#address-cells = <1>;
134 			#size-cells = <0>;
135 			samsung,sysreg-phandle = <&sysreg_system_controller>;
140 			compatible = "samsung,s3c2440-i2c";
141 			reg = <0x12C70000 0x100>;
143 			#address-cells = <1>;
144 			#size-cells = <0>;
145 			samsung,sysreg-phandle = <&sysreg_system_controller>;
150 			compatible = "samsung,s3c2440-i2c";
151 			reg = <0x12C80000 0x100>;
153 			#address-cells = <1>;
154 			#size-cells = <0>;
155 			samsung,sysreg-phandle = <&sysreg_system_controller>;
160 			compatible = "samsung,s3c2440-i2c";
161 			reg = <0x12C90000 0x100>;
163 			#address-cells = <1>;
164 			#size-cells = <0>;
165 			samsung,sysreg-phandle = <&sysreg_system_controller>;
170 			compatible = "samsung,exynos4210-pwm";
171 			reg = <0x12DD0000 0x100>;
177 			samsung,pwm-outputs = <0>, <1>, <2>, <3>;
178 			#pwm-cells = <3>;
182 			compatible = "samsung,s3c6410-rtc";
183 			reg = <0x101E0000 0x100>;
190 			compatible = "samsung,exynos5250-fimd";
191 			interrupt-parent = <&combiner>;
192 			reg = <0x14400000 0x40000>;
193 			interrupt-names = "fifo", "vsync", "lcd_sys";
199 		dp: dp-controller@145b0000 {
200 			compatible = "samsung,exynos5-dp";
201 			reg = <0x145B0000 0x1000>;
203 			interrupt-parent = <&combiner>;
208 			compatible = "samsung,exynos4210-secss";
209 			reg = <0x10830000 0x300>;
214 			compatible = "samsung,exynos5250-prng";
215 			reg = <0x10830400 0x200>;
219 			compatible = "samsung,exynos5250-trng";
220 			reg = <0x10830600 0x100>;
224 			compatible = "samsung,exynos5250-g2d";
225 			reg = <0x10850000 0x1000>;