Lines Matching +full:reg +full:- +full:names
1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
7 * Copyright (c) 2010-2011 Linaro Ltd.
19 #include <dt-bindings/clock/exynos4.h>
20 #include <dt-bindings/clock/exynos-audss-clk.h>
21 #include <dt-bindings/interrupt-controller/arm-gic.h>
22 #include <dt-bindings/interrupt-controller/irq.h>
25 interrupt-parent = <&gic>;
26 #address-cells = <1>;
27 #size-cells = <1>;
55 compatible = "arm,cortex-a9-pmu";
56 interrupt-parent = <&combiner>;
61 compatible = "simple-bus";
62 #address-cells = <1>;
63 #size-cells = <1>;
66 clock_audss: clock-controller@3810000 {
67 compatible = "samsung,exynos4210-audss-clock";
68 reg = <0x03810000 0x0C>;
69 #clock-cells = <1>;
73 clock-names = "pll_ref", "pll_in", "sclk_audio",
78 compatible = "samsung,s5pv210-i2s";
79 reg = <0x03830000 0x100>;
83 clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
84 #clock-cells = <1>;
85 clock-output-names = "i2s_cdclk0";
87 dma-names = "tx", "rx", "tx-sec";
88 samsung,idma-addr = <0x03000000>;
89 #sound-dai-cells = <1>;
94 compatible = "samsung,exynos4210-chipid";
95 reg = <0x10000000 0x100>;
98 scu: snoop-control-unit@10500000 {
99 compatible = "arm,cortex-a9-scu";
100 reg = <0x10500000 0x2000>;
103 memory-controller@12570000 {
104 compatible = "samsung,exynos4210-srom";
105 reg = <0x12570000 0x14>;
108 mipi_phy: video-phy {
109 compatible = "samsung,s5pv210-mipi-video-phy";
110 #phy-cells = <1>;
114 pd_mfc: power-domain@10023c40 {
115 compatible = "samsung,exynos4210-pd";
116 reg = <0x10023C40 0x20>;
117 #power-domain-cells = <0>;
121 pd_g3d: power-domain@10023c60 {
122 compatible = "samsung,exynos4210-pd";
123 reg = <0x10023C60 0x20>;
124 #power-domain-cells = <0>;
128 pd_lcd0: power-domain@10023c80 {
129 compatible = "samsung,exynos4210-pd";
130 reg = <0x10023C80 0x20>;
131 #power-domain-cells = <0>;
135 pd_tv: power-domain@10023c20 {
136 compatible = "samsung,exynos4210-pd";
137 reg = <0x10023C20 0x20>;
138 #power-domain-cells = <0>;
139 power-domains = <&pd_lcd0>;
143 pd_cam: power-domain@10023c00 {
144 compatible = "samsung,exynos4210-pd";
145 reg = <0x10023C00 0x20>;
146 #power-domain-cells = <0>;
150 pd_gps: power-domain@10023ce0 {
151 compatible = "samsung,exynos4210-pd";
152 reg = <0x10023CE0 0x20>;
153 #power-domain-cells = <0>;
157 pd_gps_alive: power-domain@10023d00 {
158 compatible = "samsung,exynos4210-pd";
159 reg = <0x10023D00 0x20>;
160 #power-domain-cells = <0>;
164 gic: interrupt-controller@10490000 {
165 compatible = "arm,cortex-a9-gic";
166 #interrupt-cells = <3>;
167 interrupt-controller;
168 reg = <0x10490000 0x10000>, <0x10480000 0x10000>;
171 combiner: interrupt-controller@10440000 {
172 compatible = "samsung,exynos4210-combiner";
173 #interrupt-cells = <2>;
174 interrupt-controller;
175 reg = <0x10440000 0x1000>;
179 compatible = "samsung,exynos4-sysreg", "syscon";
180 reg = <0x10010000 0x400>;
183 pmu_system_controller: system-controller@10020000 {
184 compatible = "samsung,exynos4210-pmu", "syscon";
185 reg = <0x10020000 0x4000>;
186 interrupt-controller;
187 #interrupt-cells = <3>;
188 interrupt-parent = <&gic>;
192 compatible = "samsung,exynos4210-mipi-dsi";
193 reg = <0x11C80000 0x10000>;
195 power-domains = <&pd_lcd0>;
197 phy-names = "dsim";
199 clock-names = "bus_clk", "sclk_mipi";
201 #address-cells = <1>;
202 #size-cells = <0>;
206 compatible = "samsung,fimc", "simple-bus";
208 #address-cells = <1>;
209 #size-cells = <1>;
210 #clock-cells = <1>;
211 clock-output-names = "cam_a_clkout", "cam_b_clkout";
215 compatible = "samsung,exynos4210-fimc";
216 reg = <0x11800000 0x1000>;
220 clock-names = "fimc", "sclk_fimc";
221 power-domains = <&pd_cam>;
228 compatible = "samsung,exynos4210-fimc";
229 reg = <0x11810000 0x1000>;
233 clock-names = "fimc", "sclk_fimc";
234 power-domains = <&pd_cam>;
241 compatible = "samsung,exynos4210-fimc";
242 reg = <0x11820000 0x1000>;
246 clock-names = "fimc", "sclk_fimc";
247 power-domains = <&pd_cam>;
254 compatible = "samsung,exynos4210-fimc";
255 reg = <0x11830000 0x1000>;
259 clock-names = "fimc", "sclk_fimc";
260 power-domains = <&pd_cam>;
267 compatible = "samsung,exynos4210-csis";
268 reg = <0x11880000 0x4000>;
272 clock-names = "csis", "sclk_csis";
273 bus-width = <4>;
274 power-domains = <&pd_cam>;
276 phy-names = "csis";
278 #address-cells = <1>;
279 #size-cells = <0>;
283 compatible = "samsung,exynos4210-csis";
284 reg = <0x11890000 0x4000>;
288 clock-names = "csis", "sclk_csis";
289 bus-width = <2>;
290 power-domains = <&pd_cam>;
292 phy-names = "csis";
294 #address-cells = <1>;
295 #size-cells = <0>;
300 compatible = "samsung,s3c6410-rtc";
301 reg = <0x10070000 0x100>;
302 interrupt-parent = <&pmu_system_controller>;
306 clock-names = "rtc";
311 compatible = "samsung,s5pv210-keypad";
312 reg = <0x100A0000 0x100>;
315 clock-names = "keypad";
320 compatible = "samsung,exynos4210-sdhci";
321 reg = <0x12510000 0x100>;
324 clock-names = "hsmmc", "mmc_busclk.2";
329 compatible = "samsung,exynos4210-sdhci";
330 reg = <0x12520000 0x100>;
333 clock-names = "hsmmc", "mmc_busclk.2";
338 compatible = "samsung,exynos4210-sdhci";
339 reg = <0x12530000 0x100>;
342 clock-names = "hsmmc", "mmc_busclk.2";
347 compatible = "samsung,exynos4210-sdhci";
348 reg = <0x12540000 0x100>;
351 clock-names = "hsmmc", "mmc_busclk.2";
355 exynos_usbphy: exynos-usbphy@125b0000 {
356 compatible = "samsung,exynos4210-usb2-phy";
357 reg = <0x125B0000 0x100>;
358 samsung,pmureg-phandle = <&pmu_system_controller>;
360 clock-names = "phy", "ref";
361 #phy-cells = <1>;
366 compatible = "samsung,s3c6400-hsotg";
367 reg = <0x12480000 0x20000>;
370 clock-names = "otg";
372 phy-names = "usb2-phy";
377 compatible = "samsung,exynos4210-ehci";
378 reg = <0x12580000 0x100>;
381 clock-names = "usbhost";
384 phy-names = "host", "hsic0", "hsic1";
388 compatible = "samsung,exynos4210-ohci";
389 reg = <0x12590000 0x100>;
392 clock-names = "usbhost";
395 phy-names = "host";
399 compatible = "samsung,exynos4210-mali", "arm,mali-400";
400 reg = <0x13000000 0x10000>;
402 * CLK_G3D is not actually bus clock but a IP-level clock.
407 clock-names = "bus", "core";
408 power-domains = <&pd_g3d>;
413 compatible = "samsung,s3c6410-i2s";
414 reg = <0x13960000 0x100>;
416 clock-names = "iis";
417 #clock-cells = <1>;
418 clock-output-names = "i2s_cdclk1";
420 dma-names = "tx", "rx";
421 #sound-dai-cells = <1>;
426 compatible = "samsung,s3c6410-i2s";
427 reg = <0x13970000 0x100>;
429 clock-names = "iis";
430 #clock-cells = <1>;
431 clock-output-names = "i2s_cdclk2";
433 dma-names = "tx", "rx";
434 #sound-dai-cells = <1>;
439 compatible = "samsung,mfc-v5";
440 reg = <0x13400000 0x10000>;
442 power-domains = <&pd_mfc>;
444 clock-names = "mfc", "sclk_mfc";
446 iommu-names = "left", "right";
450 compatible = "samsung,exynos4210-uart";
451 reg = <0x13800000 0x100>;
454 clock-names = "uart", "clk_uart_baud0";
456 dma-names = "rx", "tx";
461 compatible = "samsung,exynos4210-uart";
462 reg = <0x13810000 0x100>;
465 clock-names = "uart", "clk_uart_baud0";
467 dma-names = "rx", "tx";
472 compatible = "samsung,exynos4210-uart";
473 reg = <0x13820000 0x100>;
476 clock-names = "uart", "clk_uart_baud0";
478 dma-names = "rx", "tx";
483 compatible = "samsung,exynos4210-uart";
484 reg = <0x13830000 0x100>;
487 clock-names = "uart", "clk_uart_baud0";
489 dma-names = "rx", "tx";
494 #address-cells = <1>;
495 #size-cells = <0>;
496 compatible = "samsung,s3c2440-i2c";
497 reg = <0x13860000 0x100>;
500 clock-names = "i2c";
501 pinctrl-names = "default";
502 pinctrl-0 = <&i2c0_bus>;
507 #address-cells = <1>;
508 #size-cells = <0>;
509 compatible = "samsung,s3c2440-i2c";
510 reg = <0x13870000 0x100>;
513 clock-names = "i2c";
514 pinctrl-names = "default";
515 pinctrl-0 = <&i2c1_bus>;
520 #address-cells = <1>;
521 #size-cells = <0>;
522 compatible = "samsung,s3c2440-i2c";
523 reg = <0x13880000 0x100>;
526 clock-names = "i2c";
527 pinctrl-names = "default";
528 pinctrl-0 = <&i2c2_bus>;
533 #address-cells = <1>;
534 #size-cells = <0>;
535 compatible = "samsung,s3c2440-i2c";
536 reg = <0x13890000 0x100>;
539 clock-names = "i2c";
540 pinctrl-names = "default";
541 pinctrl-0 = <&i2c3_bus>;
546 #address-cells = <1>;
547 #size-cells = <0>;
548 compatible = "samsung,s3c2440-i2c";
549 reg = <0x138A0000 0x100>;
552 clock-names = "i2c";
553 pinctrl-names = "default";
554 pinctrl-0 = <&i2c4_bus>;
559 #address-cells = <1>;
560 #size-cells = <0>;
561 compatible = "samsung,s3c2440-i2c";
562 reg = <0x138B0000 0x100>;
565 clock-names = "i2c";
566 pinctrl-names = "default";
567 pinctrl-0 = <&i2c5_bus>;
572 #address-cells = <1>;
573 #size-cells = <0>;
574 compatible = "samsung,s3c2440-i2c";
575 reg = <0x138C0000 0x100>;
578 clock-names = "i2c";
579 pinctrl-names = "default";
580 pinctrl-0 = <&i2c6_bus>;
585 #address-cells = <1>;
586 #size-cells = <0>;
587 compatible = "samsung,s3c2440-i2c";
588 reg = <0x138D0000 0x100>;
591 clock-names = "i2c";
592 pinctrl-names = "default";
593 pinctrl-0 = <&i2c7_bus>;
598 #address-cells = <1>;
599 #size-cells = <0>;
600 compatible = "samsung,s3c2440-hdmiphy-i2c";
601 reg = <0x138E0000 0x100>;
604 clock-names = "i2c";
608 compatible = "exynos4210-hdmiphy";
609 reg = <0x38>;
614 compatible = "samsung,exynos4210-spi";
615 reg = <0x13920000 0x100>;
618 dma-names = "tx", "rx";
619 #address-cells = <1>;
620 #size-cells = <0>;
622 clock-names = "spi", "spi_busclk0";
623 pinctrl-names = "default";
624 pinctrl-0 = <&spi0_bus>;
629 compatible = "samsung,exynos4210-spi";
630 reg = <0x13930000 0x100>;
633 dma-names = "tx", "rx";
634 #address-cells = <1>;
635 #size-cells = <0>;
637 clock-names = "spi", "spi_busclk0";
638 pinctrl-names = "default";
639 pinctrl-0 = <&spi1_bus>;
644 compatible = "samsung,exynos4210-spi";
645 reg = <0x13940000 0x100>;
648 dma-names = "tx", "rx";
649 #address-cells = <1>;
650 #size-cells = <0>;
652 clock-names = "spi", "spi_busclk0";
653 pinctrl-names = "default";
654 pinctrl-0 = <&spi2_bus>;
659 compatible = "samsung,exynos4210-pwm";
660 reg = <0x139D0000 0x1000>;
667 clock-names = "timers";
668 #pwm-cells = <3>;
674 reg = <0x12680000 0x1000>;
677 clock-names = "apb_pclk";
678 #dma-cells = <1>;
679 #dma-channels = <8>;
680 #dma-requests = <32>;
685 reg = <0x12690000 0x1000>;
688 clock-names = "apb_pclk";
689 #dma-cells = <1>;
690 #dma-channels = <8>;
691 #dma-requests = <32>;
696 reg = <0x12850000 0x1000>;
699 clock-names = "apb_pclk";
700 #dma-cells = <1>;
701 #dma-channels = <8>;
702 #dma-requests = <1>;
706 compatible = "samsung,exynos4210-fimd";
707 interrupt-parent = <&combiner>;
708 reg = <0x11c00000 0x20000>;
709 interrupt-names = "fifo", "vsync", "lcd_sys";
712 clock-names = "sclk_fimd", "fimd";
713 power-domains = <&pd_lcd0>;
720 interrupt-parent = <&combiner>;
721 reg = <0x100C0000 0x100>;
724 #thermal-sensor-cells = <0>;
727 jpeg_codec: jpeg-codec@11840000 {
728 compatible = "samsung,exynos4210-jpeg";
729 reg = <0x11840000 0x1000>;
732 clock-names = "jpeg";
733 power-domains = <&pd_cam>;
738 compatible = "samsung,exynos4210-rotator";
739 reg = <0x12810000 0x64>;
742 clock-names = "rotator";
747 compatible = "samsung,exynos4210-hdmi";
748 reg = <0x12D00000 0x70000>;
750 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
757 power-domains = <&pd_tv>;
758 samsung,syscon-phandle = <&pmu_system_controller>;
759 #sound-dai-cells = <0>;
764 compatible = "samsung,s5p-cec";
765 reg = <0x100B0000 0x200>;
768 clock-names = "hdmicec";
769 samsung,syscon-phandle = <&pmu_system_controller>;
770 hdmi-phandle = <&hdmi>;
771 pinctrl-names = "default";
772 pinctrl-0 = <&hdmi_cec>;
777 compatible = "samsung,exynos4210-mixer";
779 reg = <0x12C10000 0x2100>, <0x12c00000 0x300>;
780 power-domains = <&pd_tv>;
786 compatible = "samsung,exynos-ppmu";
787 reg = <0x106a0000 0x2000>;
789 clock-names = "ppmu";
794 compatible = "samsung,exynos-ppmu";
795 reg = <0x106b0000 0x2000>;
797 clock-names = "ppmu";
802 compatible = "samsung,exynos-ppmu";
803 reg = <0x106c0000 0x2000>;
805 clock-names = "ppmu";
810 compatible = "samsung,exynos-ppmu";
811 reg = <0x112a0000 0x2000>;
813 clock-names = "ppmu";
818 compatible = "samsung,exynos-ppmu";
819 reg = <0x116a0000 0x2000>;
821 clock-names = "ppmu";
826 compatible = "samsung,exynos-ppmu";
827 reg = <0x11ac0000 0x2000>;
829 clock-names = "ppmu";
834 compatible = "samsung,exynos-ppmu";
835 reg = <0x11e40000 0x2000>;
837 clock-names = "ppmu";
842 compatible = "samsung,exynos-ppmu";
843 reg = <0x12630000 0x2000>;
848 compatible = "samsung,exynos-ppmu";
849 reg = <0x12aa0000 0x2000>;
851 clock-names = "ppmu";
856 compatible = "samsung,exynos-ppmu";
857 reg = <0x12e40000 0x2000>;
859 clock-names = "ppmu";
864 compatible = "samsung,exynos-ppmu";
865 reg = <0x13220000 0x2000>;
867 clock-names = "ppmu";
872 compatible = "samsung,exynos-ppmu";
873 reg = <0x13660000 0x2000>;
875 clock-names = "ppmu";
880 compatible = "samsung,exynos-ppmu";
881 reg = <0x13670000 0x2000>;
883 clock-names = "ppmu";
888 compatible = "samsung,exynos-sysmmu";
889 reg = <0x13620000 0x1000>;
890 interrupt-parent = <&combiner>;
892 clock-names = "sysmmu", "master";
894 power-domains = <&pd_mfc>;
895 #iommu-cells = <0>;
899 compatible = "samsung,exynos-sysmmu";
900 reg = <0x13630000 0x1000>;
901 interrupt-parent = <&combiner>;
903 clock-names = "sysmmu", "master";
905 power-domains = <&pd_mfc>;
906 #iommu-cells = <0>;
910 compatible = "samsung,exynos-sysmmu";
911 reg = <0x12E20000 0x1000>;
912 interrupt-parent = <&combiner>;
914 clock-names = "sysmmu", "master";
916 power-domains = <&pd_tv>;
917 #iommu-cells = <0>;
921 compatible = "samsung,exynos-sysmmu";
922 reg = <0x11A20000 0x1000>;
923 interrupt-parent = <&combiner>;
925 clock-names = "sysmmu", "master";
927 power-domains = <&pd_cam>;
928 #iommu-cells = <0>;
932 compatible = "samsung,exynos-sysmmu";
933 reg = <0x11A30000 0x1000>;
934 interrupt-parent = <&combiner>;
936 clock-names = "sysmmu", "master";
938 power-domains = <&pd_cam>;
939 #iommu-cells = <0>;
943 compatible = "samsung,exynos-sysmmu";
944 reg = <0x11A40000 0x1000>;
945 interrupt-parent = <&combiner>;
947 clock-names = "sysmmu", "master";
949 power-domains = <&pd_cam>;
950 #iommu-cells = <0>;
954 compatible = "samsung,exynos-sysmmu";
955 reg = <0x11A50000 0x1000>;
956 interrupt-parent = <&combiner>;
958 clock-names = "sysmmu", "master";
960 power-domains = <&pd_cam>;
961 #iommu-cells = <0>;
965 compatible = "samsung,exynos-sysmmu";
966 reg = <0x11A60000 0x1000>;
967 interrupt-parent = <&combiner>;
969 clock-names = "sysmmu", "master";
971 power-domains = <&pd_cam>;
972 #iommu-cells = <0>;
976 compatible = "samsung,exynos-sysmmu";
977 reg = <0x12A30000 0x1000>;
978 interrupt-parent = <&combiner>;
980 clock-names = "sysmmu", "master";
983 #iommu-cells = <0>;
987 compatible = "samsung,exynos-sysmmu";
988 reg = <0x11E20000 0x1000>;
989 interrupt-parent = <&combiner>;
991 clock-names = "sysmmu", "master";
993 power-domains = <&pd_lcd0>;
994 #iommu-cells = <0>;
998 compatible = "samsung,exynos4210-secss";
999 reg = <0x10830000 0x300>;
1002 clock-names = "secss";
1006 compatible = "samsung,exynos4-rng";
1007 reg = <0x10830400 0x200>;
1009 clock-names = "secss";
1014 #include "exynos-syscon-restart.dtsi"