Lines Matching +full:reg +full:- +full:names
1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
13 interrupt-parent = <&gic>;
14 #address-cells = <1>;
15 #size-cells = <1>;
28 #address-cells = <1>;
29 #size-cells = <0>;
33 compatible = "arm,cortex-a9";
34 reg = <0>;
35 clock-frequency = <533000000>;
39 compatible = "arm,cortex-a9";
40 reg = <1>;
41 clock-frequency = <533000000>;
45 gic: interrupt-controller@e0020000 {
47 interrupt-controller;
48 #interrupt-cells = <3>;
49 reg = <0xe0028000 0x1000>,
54 compatible = "arm,cortex-a9-pmu";
57 interrupt-affinity = <&cpu0>, <&cpu1>;
61 compatible = "renesas,emev2-smu";
62 reg = <0xe0110000 0x10000>;
63 #address-cells = <2>;
64 #size-cells = <0>;
67 compatible = "fixed-clock";
68 clock-frequency = <32768>;
69 #clock-cells = <0>;
72 compatible = "renesas,emev2-smu-clkdiv";
73 reg = <0x624 0>;
75 #clock-cells = <0>;
78 compatible = "renesas,emev2-smu-gclk";
79 reg = <0x48c 1>;
81 #clock-cells = <0>;
84 compatible = "renesas,emev2-smu-clkdiv";
85 reg = <0x624 16>;
87 #clock-cells = <0>;
90 compatible = "renesas,emev2-smu-gclk";
91 reg = <0x490 1>;
93 #clock-cells = <0>;
96 compatible = "fixed-factor-clock";
98 clock-div = <1>;
99 clock-mult = <7000>;
100 #clock-cells = <0>;
103 compatible = "renesas,emev2-smu-clkdiv";
104 reg = <0x610 0>;
106 #clock-cells = <0>;
109 compatible = "renesas,emev2-smu-clkdiv";
110 reg = <0x65c 0>;
112 #clock-cells = <0>;
115 compatible = "renesas,emev2-smu-clkdiv";
116 reg = <0x65c 16>;
118 #clock-cells = <0>;
121 compatible = "renesas,emev2-smu-clkdiv";
122 reg = <0x660 0>;
124 #clock-cells = <0>;
127 compatible = "renesas,emev2-smu-gclk";
128 reg = <0x4a0 1>;
130 #clock-cells = <0>;
133 compatible = "renesas,emev2-smu-gclk";
134 reg = <0x4b8 1>;
136 #clock-cells = <0>;
139 compatible = "renesas,emev2-smu-gclk";
140 reg = <0x4bc 1>;
142 #clock-cells = <0>;
145 compatible = "renesas,emev2-smu-gclk";
146 reg = <0x4c0 1>;
148 #clock-cells = <0>;
151 compatible = "renesas,emev2-smu-gclk";
152 reg = <0x528 1>;
154 #clock-cells = <0>;
159 compatible = "renesas,em-sti";
160 reg = <0xe0180000 0x54>;
163 clock-names = "sclk";
167 compatible = "renesas,em-uart";
168 reg = <0xe1020000 0x38>;
171 clock-names = "sclk";
175 compatible = "renesas,em-uart";
176 reg = <0xe1030000 0x38>;
179 clock-names = "sclk";
183 compatible = "renesas,em-uart";
184 reg = <0xe1040000 0x38>;
187 clock-names = "sclk";
191 compatible = "renesas,em-uart";
192 reg = <0xe1050000 0x38>;
195 clock-names = "sclk";
199 compatible = "renesas,pfc-emev2";
200 reg = <0xe0140200 0x100>;
204 compatible = "renesas,em-gio";
205 reg = <0xe0050000 0x2c>, <0xe0050040 0x20>;
208 gpio-controller;
209 gpio-ranges = <&pfc 0 0 32>;
210 #gpio-cells = <2>;
212 interrupt-controller;
213 #interrupt-cells = <2>;
217 compatible = "renesas,em-gio";
218 reg = <0xe0050080 0x2c>, <0xe00500c0 0x20>;
221 gpio-controller;
222 gpio-ranges = <&pfc 0 32 32>;
223 #gpio-cells = <2>;
225 interrupt-controller;
226 #interrupt-cells = <2>;
230 compatible = "renesas,em-gio";
231 reg = <0xe0050100 0x2c>, <0xe0050140 0x20>;
234 gpio-controller;
235 gpio-ranges = <&pfc 0 64 32>;
236 #gpio-cells = <2>;
238 interrupt-controller;
239 #interrupt-cells = <2>;
243 compatible = "renesas,em-gio";
244 reg = <0xe0050180 0x2c>, <0xe00501c0 0x20>;
247 gpio-controller;
248 gpio-ranges = <&pfc 0 96 32>;
249 #gpio-cells = <2>;
251 interrupt-controller;
252 #interrupt-cells = <2>;
256 compatible = "renesas,em-gio";
257 reg = <0xe0050200 0x2c>, <0xe0050240 0x20>;
260 gpio-controller;
261 gpio-ranges = <&pfc 0 128 31>;
262 #gpio-cells = <2>;
264 interrupt-controller;
265 #interrupt-cells = <2>;
269 #address-cells = <1>;
270 #size-cells = <0>;
271 compatible = "renesas,iic-emev2";
272 reg = <0xe0070000 0x28>;
275 clock-names = "sclk";
280 #address-cells = <1>;
281 #size-cells = <0>;
282 compatible = "renesas,iic-emev2";
283 reg = <0xe10a0000 0x28>;
286 clock-names = "sclk";