Lines Matching full:clocks
11 clocks = <&atl_clkctrl DRA7_ATL_ATL_CLKCTRL 26>;
17 clocks = <&atl_clkctrl DRA7_ATL_ATL_CLKCTRL 26>;
23 clocks = <&atl_clkctrl DRA7_ATL_ATL_CLKCTRL 26>;
29 clocks = <&atl_clkctrl DRA7_ATL_ATL_CLKCTRL 26>;
107 clocks = <&sys_clkin1>;
199 clocks = <&abe_dpll_clk_mux>, <&abe_dpll_bypass_clk_mux>;
206 clocks = <&dpll_abe_ck>;
212 clocks = <&dpll_abe_x2_ck>;
223 clocks = <&dpll_abe_m2x2_ck>;
232 clocks = <&dpll_abe_ck>;
243 clocks = <&dpll_abe_x2_ck>;
254 clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>;
262 clocks = <&sys_clkin1>, <&dpll_core_byp_mux>;
269 clocks = <&dpll_core_ck>;
275 clocks = <&dpll_core_x2_ck>;
286 clocks = <&dpll_core_h12x2_ck>;
294 clocks = <&sys_clkin1>, <&mpu_dpll_hs_clk_div>;
301 clocks = <&dpll_mpu_ck>;
312 clocks = <&dpll_mpu_m2_ck>;
320 clocks = <&dpll_core_h12x2_ck>;
328 clocks = <&sys_clkin1>, <&dsp_dpll_hs_clk_div>;
336 clocks = <&sys_clkin1>, <&dpll_dsp_byp_mux>;
338 assigned-clocks = <&dpll_dsp_ck>;
345 clocks = <&dpll_dsp_ck>;
351 assigned-clocks = <&dpll_dsp_m2_ck>;
358 clocks = <&dpll_core_h12x2_ck>;
366 clocks = <&sys_clkin1>, <&iva_dpll_hs_clk_div>;
374 clocks = <&sys_clkin1>, <&dpll_iva_byp_mux>;
376 assigned-clocks = <&dpll_iva_ck>;
383 clocks = <&dpll_iva_ck>;
389 assigned-clocks = <&dpll_iva_m2_ck>;
396 clocks = <&dpll_iva_m2_ck>;
404 clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>;
412 clocks = <&sys_clkin1>, <&dpll_gpu_byp_mux>;
414 assigned-clocks = <&dpll_gpu_ck>;
421 clocks = <&dpll_gpu_ck>;
427 assigned-clocks = <&dpll_gpu_m2_ck>;
434 clocks = <&dpll_core_ck>;
445 clocks = <&dpll_core_m2_ck>;
453 clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>;
461 clocks = <&sys_clkin1>, <&dpll_ddr_byp_mux>;
468 clocks = <&dpll_ddr_ck>;
479 clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>;
487 clocks = <&sys_clkin1>, <&dpll_gmac_byp_mux>;
494 clocks = <&dpll_gmac_ck>;
505 clocks = <&video2_m2_clkin_ck>;
513 clocks = <&video1_m2_clkin_ck>;
521 clocks = <&hdmi_clkin_ck>;
529 clocks = <&dpll_abe_m3x2_ck>;
537 clocks = <&dpll_abe_m3x2_ck>;
545 clocks = <&dpll_core_h12x2_ck>;
553 clocks = <&sys_clkin1>, <&eve_dpll_hs_clk_div>;
561 clocks = <&sys_clkin1>, <&dpll_eve_byp_mux>;
568 clocks = <&dpll_eve_ck>;
579 clocks = <&dpll_eve_m2_ck>;
587 clocks = <&dpll_core_x2_ck>;
598 clocks = <&dpll_core_x2_ck>;
609 clocks = <&dpll_core_x2_ck>;
620 clocks = <&dpll_core_x2_ck>;
631 clocks = <&dpll_core_x2_ck>;
642 clocks = <&dpll_ddr_ck>;
648 clocks = <&dpll_ddr_x2_ck>;
659 clocks = <&dpll_dsp_ck>;
665 clocks = <&dpll_dsp_x2_ck>;
671 assigned-clocks = <&dpll_dsp_m3x2_ck>;
678 clocks = <&dpll_gmac_ck>;
684 clocks = <&dpll_gmac_x2_ck>;
695 clocks = <&dpll_gmac_x2_ck>;
706 clocks = <&dpll_gmac_x2_ck>;
717 clocks = <&dpll_gmac_x2_ck>;
728 clocks = <&dpll_gmac_h11x2_ck>;
736 clocks = <&hdmi_clkin_ck>;
744 clocks = <&hdmi_clkin_ck>;
755 clocks = <&dpll_core_h12x2_ck>;
762 clocks = <&l3_iclk_div>;
770 clocks = <&video1_clkin_ck>;
778 clocks = <&video1_clkin_ck>;
786 clocks = <&video2_clkin_ck>;
794 clocks = <&video2_clkin_ck>;
809 …clocks = <&virt_12000000_ck>, <&virt_20000000_ck>, <&virt_16800000_ck>, <&virt_19200000_ck>, <&vir…
817 clocks = <&sys_clkin1>, <&sys_clkin2>;
824 clocks = <&abe_dpll_sys_clk_mux>, <&sys_32k_ck>;
831 clocks = <&abe_dpll_sys_clk_mux>, <&sys_32k_ck>;
838 clocks = <&dpll_abe_m2x2_ck>;
846 clocks = <&abe_clk>;
854 clocks = <&aess_fclk>;
862 clocks = <&dpll_abe_m2x2_ck>;
870 clocks = <&sys_clkin1>;
878 clocks = <&sys_clkin1>, <&sys_clkin2>, <&sys_32k_ck>;
885 clocks = <&sys_clkin1>;
894 clocks = <&sys_clkin2>;
903 clocks = <&dpll_abe_m2_ck>;
912 clocks = <&dpll_dsp_m2_ck>;
921 clocks = <&dpll_gpu_m2_ck>;
930 clocks = <&dpll_ddr_m2_ck>;
939 clocks = <&dpll_gmac_m2_ck>;
948 clocks = <&gmac_250m_dclk_div>;
956 clocks = <&dpll_usb_m2_ck>;
965 clocks = <&usb_otg_clkin_ck>;
974 clocks = <&sys_clkin1>;
983 clocks = <&dpll_pcie_ref_m2_ck>;
992 clocks = <&apll_pcie_m2_ck>;
1001 clocks = <&sys_clkin1>;
1010 clocks = <&secure_32k_clk_src_ck>;
1019 …clocks = <&sys_clk1_dclk_div>, <&sys_clk2_dclk_div>, <&per_abe_x1_dclk_div>, <&mpu_dclk_div>, <&ds…
1026 …clocks = <&sys_clk1_dclk_div>, <&sys_clk2_dclk_div>, <&per_abe_x1_dclk_div>, <&mpu_dclk_div>, <&ds…
1033 …clocks = <&sys_clk1_dclk_div>, <&sys_clk2_dclk_div>, <&per_abe_x1_dclk_div>, <&mpu_dclk_div>, <&ds…
1040 clocks = <&sys_clkin1>;
1048 clocks = <&dpll_eve_m2_ck>, <&dpll_dsp_m3x2_ck>;
1055 clocks = <&sys_clkin1>, <&sys_clkin2>;
1062 clocks = <&mlb_clkin_ck>;
1071 clocks = <&mlbp_clkin_ck>;
1080 clocks = <&dpll_abe_m2_ck>;
1089 clocks = <&sys_clkin1>;
1097 clocks = <&sys_clkin1>, <&sys_clkin2>;
1104 clocks = <&sys_clkin1>, <&sys_clkin2>;
1111 clocks = <&sys_clkin1>, <&abe_lp_clk_div>;
1120 clocks = <&sys_clkin1>, <&sys_clkin1>;
1127 clocks = <&dpll_pcie_ref_ck>;
1137 clocks = <&dpll_pcie_ref_m2ldo_ck>, <&pciesref_acs_clk_ck>;
1146 clocks = <&apll_pcie_in_clk_mux>, <&dpll_pcie_ref_ck>;
1152 clocks = <&apll_pcie_ck>;
1163 clocks = <&apll_pcie_ck>;
1171 clocks = <&apll_pcie_ck>;
1179 clocks = <&apll_pcie_ck>;
1187 clocks = <&sys_clkin1>, <&per_dpll_hs_clk_div>;
1195 clocks = <&sys_clkin1>, <&dpll_per_byp_mux>;
1202 clocks = <&dpll_per_ck>;
1213 clocks = <&dpll_per_m2_ck>;
1221 clocks = <&sys_clkin1>, <&usb_dpll_hs_clk_div>;
1229 clocks = <&sys_clkin1>, <&dpll_usb_byp_mux>;
1236 clocks = <&dpll_usb_ck>;
1247 clocks = <&dpll_pcie_ref_ck>;
1258 clocks = <&dpll_per_ck>;
1264 clocks = <&dpll_per_x2_ck>;
1275 clocks = <&dpll_per_x2_ck>;
1286 clocks = <&dpll_per_x2_ck>;
1297 clocks = <&dpll_per_x2_ck>;
1308 clocks = <&dpll_per_x2_ck>;
1319 clocks = <&dpll_usb_ck>;
1327 clocks = <&dpll_per_h11x2_ck>;
1335 clocks = <&dpll_per_m2x2_ck>;
1343 clocks = <&dpll_per_m2_ck>;
1351 clocks = <&dpll_per_m2x2_ck>;
1359 clocks = <&dpll_per_m2x2_ck>;
1367 clocks = <&dpll_usb_m2_ck>;
1375 clocks = <&clkoutmux2_clk_mux>;
1383 clocks = <&dpll_usb_clkdcoldo>;
1391 clocks = <&sys_32k_ck>;
1399 clocks = <&sys_32k_ck>;
1407 clocks = <&sys_32k_ck>;
1415 clocks = <&dpll_core_h14x2_ck>, <&dpll_per_h14x2_ck>, <&dpll_gpu_m2_ck>;
1418 assigned-clocks = <&gpu_core_gclk_mux>;
1425 clocks = <&dpll_core_h14x2_ck>, <&dpll_per_h14x2_ck>, <&dpll_gpu_m2_ck>;
1428 assigned-clocks = <&gpu_hyd_gclk_mux>;
1435 clocks = <&wkupaon_iclk_mux>;
1444 clocks = <&l3_iclk_div>, <&dpll_core_h23x2_ck>;
1452 clocks = <&l3_iclk_div>, <&dpll_core_h23x2_ck>;
1460 clocks = <&l3_iclk_div>, <&dpll_core_h23x2_ck>;
1469 clocks = <&dpll_usb_ck>;
1477 clocks = <&l3_iclk_div>;
1485 clocks = <&l4_root_clk_div>;
1493 clocks = <&l4_root_clk_div>;
1501 clocks = <&l4_root_clk_div>;
1509 …clocks = <&sys_clk32_crystal_ck>, <&sys_clk32_pseudo_ck>, <&sys_clk32_pseudo_ck>, <&sys_clk32_pseu…
1557 assigned-clocks = <&ipu1_clkctrl DRA7_IPU1_MMU_IPU1_CLKCTRL 24>;
1810 assigned-clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 24>;