boot/dts/bcm5301x.dtsi

6  * Copyright 2013-2014 Hauke Mehrtens <hauke@hauke-m.de>
11 #include <dt-bindings/clock/bcm-nsp.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
18 	#address-cells = <1>;
19 	#size-cells = <1>;
20 	interrupt-parent = <&gic>;
23 		compatible = "simple-bus";
25 		#address-cells = <1>;
26 		#size-cells = <1>;
41 			pinctrl-names = "default";
42 			pinctrl-0 = <&pinmux_uart1>;
48 		compatible = "simple-bus";
50 		#address-cells = <1>;
51 		#size-cells = <1>;
54 			#clock-cells = <0>;
55 			compatible = "brcm,nsp-armpll";
61 			compatible = "arm,cortex-a9-scu";
65 		timer@20200 {
66 			compatible = "arm,cortex-a9-global-timer";
72 		timer@20600 {
73 			compatible = "arm,cortex-a9-twd-timer";
81 			compatible = "arm,cortex-a9-twd-wdt";
88 		gic: interrupt-controller@21000 {  label
89 			compatible = "arm,cortex-a9-gic";
90 			#interrupt-cells = <3>;
91 			#address-cells = <0>;
92 			interrupt-controller;
97 		L2: cache-controller@22000 {
98 			compatible = "arm,pl310-cache";
100 			cache-unified;
101 			arm,shared-override;
102 			prefetch-data = <1>;
103 			prefetch-instr = <1>;
104 			cache-level = <2>;
109 		compatible = "arm,cortex-a9-pmu";
116 		#address-cells = <1>;
117 		#size-cells = <1>;
121 			#clock-cells = <0>;
122 			compatible = "fixed-clock";
123 			clock-frequency = <25000000>;
127 			#clock-cells = <0>;
128 			compatible = "fixed-factor-clock";
130 			clock-div = <2>;
131 			clock-mult = <1>;
135 			#clock-cells = <0>;
136 			compatible = "fixed-factor-clock";
138 			clock-div = <4>;
139 			clock-mult = <1>;
143 			#clock-cells = <0>;
144 			compatible = "fixed-factor-clock";
146 			clock-div = <2>;
147 			clock-mult = <1>;
151 	usb2_phy: usb2-phy@1800c000 {
152 		compatible = "brcm,ns-usb2-phy";
154 		reg-names = "dmu";
155 		#phy-cells = <0>;
157 		clock-names = "phy-ref-clk";
161 		compatible = "brcm,bus-axi";
164 		#address-cells = <1>;
165 		#size-cells = <1>;
167 		#interrupt-cells = <1>;
168 		interrupt-map-mask = <0x000fffff 0xffff>;
169 		interrupt-map =
171 			<0x00000000 0 &gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
174 			<0x00007000 0 &gic GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
175 			<0x00007000 1 &gic GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
176 			<0x00007000 2 &gic GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
177 			<0x00007000 3 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
178 			<0x00007000 4 &gic GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
179 			<0x00007000 5 &gic GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
180 			<0x00007000 6 &gic GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
181 			<0x00007000 7 &gic GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
182 			<0x00007000 8 &gic GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
183 			<0x00007000 9 &gic GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
184 			<0x00007000 10 &gic GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
185 			<0x00007000 11 &gic GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
186 			<0x00007000 12 &gic GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
189 			<0x00012000 0 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
190 			<0x00012000 1 &gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
191 			<0x00012000 2 &gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
192 			<0x00012000 3 &gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
193 			<0x00012000 4 &gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
194 			<0x00012000 5 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
197 			<0x00013000 0 &gic GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
198 			<0x00013000 1 &gic GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
199 			<0x00013000 2 &gic GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
200 			<0x00013000 3 &gic GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
201 			<0x00013000 4 &gic GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
202 			<0x00013000 5 &gic GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
205 			<0x00014000 0 &gic GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
206 			<0x00014000 1 &gic GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
207 			<0x00014000 2 &gic GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
208 			<0x00014000 3 &gic GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
209 			<0x00014000 4 &gic GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
210 			<0x00014000 5 &gic GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
213 			<0x00021000 0 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>,
216 			<0x00023000 0 &gic GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
219 			<0x00024000 0 &gic GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
222 			<0x00025000 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
225 			<0x00026000 0 &gic GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
228 			<0x00027000 0 &gic GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>,
231 			<0x00028000 0 &gic GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
232 			<0x00028000 1 &gic GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
233 			<0x00028000 2 &gic GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
234 			<0x00028000 3 &gic GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
235 			<0x00028000 4 &gic GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
236 			<0x00028000 5 &gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
237 			<0x00028000 6 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
238 			<0x00028000 7 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
243 			gpio-controller;
244 			#gpio-cells = <2>;
262 			#address-cells = <1>;
263 			#size-cells = <1>;
266 			interrupt-parent = <&gic>;
269 				#usb-cells = <0>;
271 				compatible = "generic-ehci";
276 				#address-cells = <1>;
277 				#size-cells = <0>;
281 					#trigger-source-cells = <0>;
286 					#trigger-source-cells = <0>;
291 				#usb-cells = <0>;
293 				compatible = "generic-ohci";
297 				#address-cells = <1>;
298 				#size-cells = <0>;
302 					#trigger-source-cells = <0>;
307 					#trigger-source-cells = <0>;
315 			#address-cells = <1>;
316 			#size-cells = <1>;
319 			interrupt-parent = <&gic>;
322 				#usb-cells = <0>;
324 				compatible = "generic-xhci";
328 				phy-names = "usb";
330 				#address-cells = <1>;
331 				#size-cells = <0>;
335 					#trigger-source-cells = <0>;
358 		compatible = "brcm,iproc-pwm";
361 		#pwm-cells = <3>;
366 		compatible = "brcm,iproc-mdio";
368 		#size-cells = <0>;
369 		#address-cells = <1>;
372 	mdio-bus-mux@18003000 {
373 		compatible = "mdio-mux-mmioreg";
374 		mdio-parent-bus = <&mdio>;
375 		#address-cells = <1>;
376 		#size-cells = <0>;
378 		mux-mask = <0x200>;
382 			#address-cells = <1>;
383 			#size-cells = <0>;
385 			usb3_phy: usb3-phy@10 {
386 				compatible = "brcm,ns-ax-usb3-phy";
388 				usb3-dmp-syscon = <&usb3_dmp>;
389 				#phy-cells = <0>;
404 		reg-shift = <2>;
409 		compatible = "brcm,iproc-i2c";
412 		#address-cells = <1>;
413 		#size-cells = <0>;
414 		clock-frequency = <100000>;
419 		compatible = "simple-bus";
421 		#address-cells = <1>;
422 		#size-cells = <1>;
425 			compatible = "simple-bus";
428 			#address-cells = <1>;
429 			#size-cells = <1>;
431 			pin-controller@1c0 {
432 				compatible = "brcm,bcm4708-pinmux";
434 				reg-names = "cru_gpio_control";
436 				spi-pins {
461 		#clock-cells = <1>;
462 		compatible = "brcm,nsp-lcpll0";
465 		clock-output-names = "lcpll0", "pcie_phy", "sdio",
470 		#clock-cells = <1>;
471 		compatible = "brcm,nsp-genpll";
474 		clock-output-names = "genpll", "phy", "ethernetclk",
480 		compatible = "brcm,ns-thermal";
482 		#thermal-sensor-cells = <0>;
486 		compatible = "brcm,bcm5301x-srab";
495 		compatible = "brcm,bcm5301x-rng";
500 		compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand";
502 		reg-names = "nand", "iproc-idm", "iproc-ext";
505 		#address-cells = <1>;
506 		#size-cells = <0>;
508 		brcm,nand-has-wp;
512 		compatible = "brcm,spi-nsp-qspi", "brcm,spi-bcm-qspi";
517 		reg-names = "mspi", "bspi", "intr_regs", "intr_status_reg";
525 		interrupt-names = "spi_lr_fullness_reached",
533 		clock-names = "iprocmed";
534 		num-cs = <2>;
535 		#address-cells = <1>;
536 		#size-cells = <0>;
538 		spi_nor: spi-nor@0 {
539 			compatible = "jedec,spi-nor";
541 			spi-max-frequency = <20000000>;
545 				compatible = "brcm,bcm947xx-cfe-partitions";
550 	thermal-zones {
551 		cpu_thermal: cpu-thermal {
552 			polling-delay-passive = <0>;
553 			polling-delay = <1000>;
554 			coefficients = <(-556) 418000>;
555 			thermal-sensors = <&thermal>;
558 				cpu-crit {
565 			cooling-maps {