Lines Matching +full:0 +full:x10000
16 #size-cells = <0>;
18 cpu@0 {
19 reg = <0x0>;
25 timebase-frequency = <0>;
26 bus-frequency = <0>;
27 clock-frequency = <0>;
49 ranges = <0x40000000 0x40000000 0x80000000>;
55 reg = <0x80020000 0x1000>;
62 ranges = <0x88000000 0x88000000 0x40000>;
66 reg = <0x88000000 0x1000>;
73 reg = <0x88010000 0x1000>;
79 reg = <0x88020000 0x1000>;
84 reg = <0x88030000 0x1000>;
93 ranges = <0x90000000 0x90000000 0x10000>;
97 reg = <0x90000000 0x2000>;
104 reg = <0x90002000 0x200>;
114 ranges = <0x90010000 0x90010000 0x30000>;
118 reg = <0x90010000 0x20000>;
123 bl-gpio = <&gpio 7 0>;
129 reg = <0x90020000 0x10000>;
140 ranges = <0x98000000 0x98000000 0x8000000>;
144 reg = <0x98000000 0x8000000>;
154 ranges = <0xa0000000 0xa0000000 0x8000000>;
158 reg = <0xa0000000 0x2000>;
168 ranges = <0xa8000000 0xa8000000 0x2000000>;
172 reg = <0xa8000000 0x10000>;
179 reg = <0xa8010000 0x10000>;
187 reg = <0xa9000000 0x1000000>;
190 resets = <&rstc 0>;
198 ranges = <0xb0000000 0xb0000000 0x180000>,
199 <0x56000000 0x56000000 0x1b00000>;
203 reg = <0xb0020000 0x1000>;
204 interrupts = <0>;
210 reg = <0xb0030000 0x10000>;
217 reg = <0xb0040000 0x10000>;
223 cell-index = <0>;
225 reg = <0xb0050000 0x1000>;
236 reg = <0xb0060000 0x1000>;
246 reg = <0xb0070000 0x1000>;
255 cell-index = <0>;
257 reg = <0xb0080000 0x10000>;
268 reg = <0xb0090000 0x10000>;
277 cell-index = <0>;
279 reg = <0xb00b0000 0x10000>;
288 reg = <0xb0160000 0x10000>;
296 reg = <0xb00C0000 0x10000>;
303 cell-index = <0>;
305 reg = <0xb00d0000 0x10000>;
312 #size-cells = <0>;
321 reg = <0xb0170000 0x10000>;
328 #size-cells = <0>;
335 cell-index = <0>;
337 reg = <0xb00e0000 0x10000>;
340 #size-cells = <0>;
347 reg = <0xb00f0000 0x10000>;
350 #size-cells = <0>;
356 reg = <0xb0110000 0x10000>;
365 reg = <0xb0120000 0x10000>;
370 lcd_16pins_a: lcd0@0 {
388 lcdrom_pins_a: lcdrom0@0 {
394 uart0_pins_a: uart0@0 {
406 uart1_pins_a: uart1@0 {
412 uart2_pins_a: uart2@0 {
424 spi0_pins_a: spi0@0 {
430 spi1_pins_a: spi1@0 {
436 i2c0_pins_a: i2c0@0 {
442 i2c1_pins_a: i2c1@0 {
448 pwm0_pins_a: pwm0@0 {
454 pwm1_pins_a: pwm1@0 {
460 pwm2_pins_a: pwm2@0 {
466 pwm3_pins_a: pwm3@0 {
472 pwm4_pins_a: pwm4@0 {
478 gps_pins_a: gps@0 {
484 vip_pins_a: vip@0 {
490 sdmmc0_pins_a: sdmmc0@0 {
496 sdmmc1_pins_a: sdmmc1@0 {
502 sdmmc2_pins_a: sdmmc2@0 {
508 sdmmc2_nowp_pins_a: sdmmc2_nowp@0 {
514 sdmmc3_pins_a: sdmmc3@0 {
520 sdmmc5_pins_a: sdmmc5@0 {
526 i2s_mclk_pins_a: i2s_mclk@0 {
532 i2s_ext_clk_input_pins_a: i2s_ext_clk_input@0 {
538 i2s_pins_a: i2s@0 {
544 i2s_no_din_pins_a: i2s_no_din@0 {
550 i2s_6chn_pins_a: i2s_6chn@0 {
556 ac97_pins_a: ac97@0 {
562 nand_pins_a: nand@0 {
568 usp0_pins_a: usp0@0 {
592 usp1_pins_a: usp1@0 {
604 usb0_upli_drvbus_pins_a: usb0_upli_drvbus@0 {
610 usb1_utmi_drvbus_pins_a: usb1_utmi_drvbus@0 {
616 usb1_dp_dn_pins_a: usb1_dp_dn@0 {
622 uart1_route_io_usb1_pins_a: uart1_route_io_usb1@0 {
628 warm_rst_pins_a: warm_rst@0 {
634 pulse_count_pins_a: pulse_count@0 {
640 cko0_pins_a: cko0@0 {
646 cko1_pins_a: cko1@0 {
656 reg = <0xb0130000 0x10000>;
662 reg = <0xb0140000 0x10000>;
668 reg = <0xb0150000 0x10000>;
677 ranges = <0x56000000 0x56000000 0x1b00000>;
680 cell-index = <0>;
682 reg = <0x56000000 0x100000>;
691 reg = <0x56100000 0x100000>;
701 reg = <0x56200000 0x100000>;
711 reg = <0x56300000 0x100000>;
721 reg = <0x56500000 0x100000>;
730 reg = <0x57900000 0x100000>;
736 reg = <0x57a00000 0x100000>;
745 reg = <0x80030000 0x10000>;
749 reg = <0x1000 0x1000>;
755 reg = <0x2000 0x1000>;
761 reg = <0x2000 0x1000>;
767 reg = <0x3000 0x1000>;
776 ranges = <0xb8000000 0xb8000000 0x40000>;
780 reg = <0xb8000000 0x10000>;
787 reg = <0xb8010000 0x10000>;
794 reg = <0xb8030000 0x10000>;