boot/dts/armada-385.dtsi

1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8  * Gregory CLEMENT <gregory.clement@free-electrons.com>
9  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 #include "armada-38x.dtsi"
19 		#address-cells = <1>;
20 		#size-cells = <0>;
21 		enable-method = "marvell,armada-380-smp";
25 			compatible = "arm,cortex-a9";
30 			compatible = "arm,cortex-a9";
37 			compatible = "marvell,armada-370-pcie";
41 			#address-cells = <3>;
42 			#size-cells = <2>;
44 			msi-parent = <&mpic>;
45 			bus-range = <0x00 0xff>;
68 				assigned-addresses = <0x82000800 0 0x80000 0 0x2000>;
70 				#address-cells = <3>;
71 				#size-cells = <2>;
72 				#interrupt-cells = <1>;
75 				bus-range = <0x00 0xff>;
76 				interrupt-map-mask = <0 0 0 0>;
77 				interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
78 				marvell,pcie-port = <0>;
79 				marvell,pcie-lane = <0>;
87 				assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
89 				#address-cells = <3>;
90 				#size-cells = <2>;
91 				#interrupt-cells = <1>;
94 				bus-range = <0x00 0xff>;
95 				interrupt-map-mask = <0 0 0 0>;
96 				interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
97 				marvell,pcie-port = <1>;
98 				marvell,pcie-lane = <0>;
106 				assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
108 				#address-cells = <3>;
109 				#size-cells = <2>;
110 				#interrupt-cells = <1>;
113 				bus-range = <0x00 0xff>;
114 				interrupt-map-mask = <0 0 0 0>;
115 				interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
116 				marvell,pcie-port = <2>;
117 				marvell,pcie-lane = <0>;
128 				assigned-addresses = <0x82000800 0 0x48000 0 0x2000>;
130 				#address-cells = <3>;
131 				#size-cells = <2>;
132 				#interrupt-cells = <1>;
135 				bus-range = <0x00 0xff>;
136 				interrupt-map-mask = <0 0 0 0>;
137 				interrupt-map = <0 0 0 0 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
138 				marvell,pcie-port = <3>;
139 				marvell,pcie-lane = <0>;
148 	compatible = "marvell,mv88f6820-pinctrl";