Lines Matching +full:ethernet +full:- +full:phy +full:- +full:id0141

1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 * Copyright (C) 2016 Uwe Kleine-König <uwe@kleine-koenig.org>
8 * Schematic available at https://www.turris.cz/doc/_media/rtrom01-schema.pdf
11 /dts-v1/;
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/input/input.h>
15 #include "armada-385.dtsi"
19 compatible = "cznic,turris-omnia", "marvell,armada385", "marvell,armada380";
22 stdout-path = &uart0;
36 internal-regs {
48 pinctrl-names = "default";
49 pinctrl-0 = <&sdhci_pins>;
52 bus-width = <8>;
53 no-1-8-v;
54 non-removable;
89 pinctrl-names = "default";
90 pinctrl-0 = <&ge0_rgmii_pins>;
92 phy-mode = "rgmii";
94 fixed-link {
96 full-duplex;
102 pinctrl-names = "default";
103 pinctrl-0 = <&ge1_rgmii_pins>;
105 phy-mode = "rgmii";
107 fixed-link {
109 full-duplex;
116 phy-mode = "sgmii";
117 phy = <&phy1>;
121 pinctrl-names = "default";
122 pinctrl-0 = <&i2c0_pins>;
127 #address-cells = <1>;
128 #size-cells = <0>;
133 #address-cells = <1>;
134 #size-cells = <0>;
157 #address-cells = <1>;
158 #size-cells = <0>;
165 #address-cells = <1>;
166 #size-cells = <0>;
173 #address-cells = <1>;
174 #size-cells = <0>;
181 #address-cells = <1>;
182 #size-cells = <0>;
189 #address-cells = <1>;
190 #size-cells = <0>;
197 #address-cells = <1>;
198 #size-cells = <0>;
205 #address-cells = <1>;
206 #size-cells = <0>;
212 * and phy irq
217 pinctrl-names = "default";
218 pinctrl-0 = <&pcawan_pins>;
220 interrupt-parent = <&gpio1>;
223 gpio-controller;
224 #gpio-cells = <2>;
231 pinctrl-names = "default";
232 pinctrl-0 = <&mdio_pins>;
235 phy1: phy@1 {
237 compatible = "ethernet-phy-id0141.0DD1", "ethernet-phy-ieee802.3-c22";
246 #address-cells = <1>;
247 #size-cells = <0>;
253 #address-cells = <1>;
254 #size-cells = <0>;
284 ethernet = <&eth1>;
285 phy-mode = "rgmii-id";
287 fixed-link {
289 full-duplex;
299 pcawan_pins: pcawan-pins {
304 spi0cs0_pins: spi0cs0-pins {
309 spi0cs1_pins: spi0cs1-pins {
316 pinctrl-names = "default";
317 pinctrl-0 = <&spi0_pins &spi0cs0_pins>;
320 spi-nor@0 {
321 compatible = "spansion,s25fl164k", "jedec,spi-nor";
322 #address-cells = <1>;
323 #size-cells = <1>;
325 spi-max-frequency = <40000000>;
328 compatible = "fixed-partitions";
329 #address-cells = <1>;
330 #size-cells = <1>;
334 label = "U-Boot";
349 pinctrl-names = "default";
350 pinctrl-0 = <&uart0_pins>;
356 pinctrl-names = "default";
357 pinctrl-0 = <&uart1_pins>;