Lines Matching +full:protect +full:- +full:exec
4 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
11 #include <dt-bindings/bus/ti-sysc.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/clock/am4.h>
18 interrupt-parent = <&wakeupgen>;
19 #address-cells = <1>;
20 #size-cells = <1>;
44 #address-cells = <1>;
45 #size-cells = <0>;
47 compatible = "arm,cortex-a9";
48 enable-method = "ti,am4372";
53 clock-names = "cpu";
55 operating-points-v2 = <&cpu0_opp_table>;
57 clock-latency = <300000>; /* From omap-cpufreq driver */
58 cpu-idle-states = <&mpu_gate>;
61 idle-states {
63 compatible = "arm,idle-state";
64 entry-latency-us = <40>;
65 exit-latency-us = <100>;
66 min-residency-us = <300>;
67 local-timer-stop;
72 cpu0_opp_table: opp-table {
73 compatible = "operating-points-v2-ti-cpu";
76 opp50-300000000 {
77 opp-hz = /bits/ 64 <300000000>;
78 opp-microvolt = <950000 931000 969000>;
79 opp-supported-hw = <0xFF 0x01>;
80 opp-suspend;
83 opp100-600000000 {
84 opp-hz = /bits/ 64 <600000000>;
85 opp-microvolt = <1100000 1078000 1122000>;
86 opp-supported-hw = <0xFF 0x04>;
89 opp120-720000000 {
90 opp-hz = /bits/ 64 <720000000>;
91 opp-microvolt = <1200000 1176000 1224000>;
92 opp-supported-hw = <0xFF 0x08>;
95 oppturbo-800000000 {
96 opp-hz = /bits/ 64 <800000000>;
97 opp-microvolt = <1260000 1234800 1285200>;
98 opp-supported-hw = <0xFF 0x10>;
101 oppnitro-1000000000 {
102 opp-hz = /bits/ 64 <1000000000>;
103 opp-microvolt = <1325000 1298500 1351500>;
104 opp-supported-hw = <0xFF 0x20>;
109 compatible = "ti,omap-infra";
111 compatible = "ti,omap4-mpu";
113 pm-sram = <&pm_sram_code
118 gic: interrupt-controller@48241000 {
119 compatible = "arm,cortex-a9-gic";
120 interrupt-controller;
121 #interrupt-cells = <3>;
124 interrupt-parent = <&gic>;
127 wakeupgen: interrupt-controller@48281000 {
128 compatible = "ti,omap4-wugen-mpu";
129 interrupt-controller;
130 #interrupt-cells = <3>;
132 interrupt-parent = <&gic>;
136 compatible = "arm,cortex-a9-scu";
141 compatible = "arm,cortex-a9-global-timer";
144 interrupt-parent = <&gic>;
149 compatible = "arm,cortex-a9-twd-timer";
152 interrupt-parent = <&gic>;
156 cache-controller@48242000 {
157 compatible = "arm,pl310-cache";
159 cache-unified;
160 cache-level = <2>;
164 compatible = "ti,am4372-l3-noc", "simple-bus";
165 #address-cells = <1>;
166 #size-cells = <1>;
169 ti,no-idle;
177 compatible = "ti,am4372-wkup-m3";
180 reg-names = "umem", "dmem";
182 ti,pm-firmware = "am335x-pm-firmware.elf";
191 compatible = "ti,emif-am4372";
195 ti,no-idle;
200 target-module@49000000 {
201 compatible = "ti,sysc-omap4", "ti,sysc";
203 reg-names = "rev";
205 clock-names = "fck";
206 #address-cells = <1>;
207 #size-cells = <1>;
211 compatible = "ti,edma3-tpcc";
213 reg-names = "edma3_cc";
217 interrupt-names = "edma3_ccint", "edma3_mperr",
219 dma-requests = <64>;
220 #dma-cells = <2>;
225 ti,edma-memcpy-channels = <58 59>;
229 target-module@49800000 {
230 compatible = "ti,sysc-omap4", "ti,sysc";
233 reg-names = "rev", "sysc";
234 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
235 ti,sysc-midle = <SYSC_IDLE_FORCE>;
236 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
239 clock-names = "fck";
240 #address-cells = <1>;
241 #size-cells = <1>;
245 compatible = "ti,edma3-tptc";
248 interrupt-names = "edma3_tcerrint";
252 target-module@49900000 {
253 compatible = "ti,sysc-omap4", "ti,sysc";
256 reg-names = "rev", "sysc";
257 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
258 ti,sysc-midle = <SYSC_IDLE_FORCE>;
259 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
262 clock-names = "fck";
263 #address-cells = <1>;
264 #size-cells = <1>;
268 compatible = "ti,edma3-tptc";
271 interrupt-names = "edma3_tcerrint";
275 target-module@49a00000 {
276 compatible = "ti,sysc-omap4", "ti,sysc";
279 reg-names = "rev", "sysc";
280 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
281 ti,sysc-midle = <SYSC_IDLE_FORCE>;
282 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
285 clock-names = "fck";
286 #address-cells = <1>;
287 #size-cells = <1>;
291 compatible = "ti,edma3-tptc";
294 interrupt-names = "edma3_tcerrint";
298 target-module@47810000 {
299 compatible = "ti,sysc-omap2", "ti,sysc";
303 reg-names = "rev", "sysc", "syss";
304 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
308 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
311 ti,syss-mask = <1>;
313 clock-names = "fck";
314 #address-cells = <1>;
315 #size-cells = <1>;
319 compatible = "ti,am437-sdhci";
320 ti,needs-special-reset;
327 sham_target: target-module@53100000 {
328 compatible = "ti,sysc-omap3-sham", "ti,sysc";
332 reg-names = "rev", "sysc", "syss";
333 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
335 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
338 ti,syss-mask = <1>;
341 clock-names = "fck";
342 #address-cells = <1>;
343 #size-cells = <1>;
347 compatible = "ti,omap5-sham";
350 dma-names = "rx";
355 aes_target: target-module@53501000 {
356 compatible = "ti,sysc-omap2", "ti,sysc";
360 reg-names = "rev", "sysc", "syss";
361 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
363 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
367 ti,syss-mask = <1>;
370 clock-names = "fck";
371 #address-cells = <1>;
372 #size-cells = <1>;
376 compatible = "ti,omap4-aes";
381 dma-names = "tx", "rx";
385 des_target: target-module@53701000 {
386 compatible = "ti,sysc-omap2", "ti,sysc";
390 reg-names = "rev", "sysc", "syss";
391 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
393 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
397 ti,syss-mask = <1>;
400 clock-names = "fck";
401 #address-cells = <1>;
402 #size-cells = <1>;
406 compatible = "ti,omap4-des";
411 dma-names = "tx", "rx";
415 pruss_tm: target-module@54400000 {
416 compatible = "ti,sysc-pruss", "ti,sysc";
419 reg-names = "rev", "sysc";
420 ti,sysc-mask = <(SYSC_PRUSS_STANDBY_INIT |
422 ti,sysc-midle = <SYSC_IDLE_FORCE>,
425 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
429 clock-names = "fck";
431 reset-names = "rstctrl";
432 #address-cells = <1>;
433 #size-cells = <1>;
438 compatible = "ti,am3352-gpmc";
441 dma-names = "rxtx";
443 clock-names = "fck";
446 gpmc,num-cs = <7>;
447 gpmc,num-waitpins = <2>;
448 #address-cells = <2>;
449 #size-cells = <1>;
450 interrupt-controller;
451 #interrupt-cells = <2>;
452 gpio-controller;
453 #gpio-cells = <2>;
457 target-module@47900000 {
458 compatible = "ti,sysc-omap4", "ti,sysc";
461 reg-names = "rev", "sysc";
462 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
467 clock-names = "fck";
468 #address-cells = <1>;
469 #size-cells = <1>;
474 compatible = "ti,am4372-qspi";
477 reg-names = "qspi_base", "qspi_mmap";
479 clock-names = "fck";
480 #address-cells = <1>;
481 #size-cells = <0>;
483 num-cs = <4>;
488 compatible = "mmio-sram";
491 #address-cells = <1>;
492 #size-cells = <1>;
494 pm_sram_code: pm-code-sram@0 {
497 protect-exec;
500 pm_sram_data: pm-data-sram@1000 {
507 target-module@56000000 {
508 compatible = "ti,sysc-omap4", "ti,sysc";
511 reg-names = "rev", "sysc";
512 ti,sysc-midle = <SYSC_IDLE_FORCE>,
515 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
519 clock-names = "fck";
520 power-domains = <&prm_gfx>;
522 reset-names = "rstctrl";
523 #address-cells = <1>;
524 #size-cells = <1>;
530 #include "am437x-l4.dtsi"
531 #include "am43xx-clocks.dtsi"
535 compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
537 #power-domain-cells = <0>;
538 #reset-cells = <1>;
542 compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
544 #reset-cells = <1>;
548 compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
550 #reset-cells = <1>;
554 compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
556 #reset-cells = <1>;
560 /* Preferred always-on timer for clocksource */
562 ti,no-reset-on-init;
563 ti,no-idle;
565 assigned-clocks = <&timer1_fck>;
566 assigned-clock-parents = <&sys_clkin_ck>;
572 ti,no-reset-on-init;
573 ti,no-idle;
575 assigned-clocks = <&timer2_fck>;
576 assigned-clock-parents = <&sys_clkin_ck>;