boot/dts/am335x-nano.dts

1 // SPDX-License-Identifier: GPL-2.0-only
3  * Copyright (C) 2013 Newflow Ltd - http://www.newflow.co.uk/
5 /dts-v1/;
15 			cpu0-supply = <&dcdc2_reg>;
25 		compatible = "gpio-leds";
30 			default-state = "off";
36 	pinctrl-names = "default";
37 	pinctrl-0 = <&misc_pins>;
40 		pinctrl-single,pins = <
46 		pinctrl-single,pins = <
90 		pinctrl-single,pins = <
97 		pinctrl-single,pins = <
104 		pinctrl-single,pins = <
113 		pinctrl-single,pins = <
122 		pinctrl-single,pins = <
131 		pinctrl-single,pins = <
140 		pinctrl-single,pins = <
147 		pinctrl-single,pins = <
161 	pinctrl-names = "default";
162 	pinctrl-0 = <&uart0_pins>;
167 	pinctrl-names = "default";
168 	pinctrl-0 = <&uart1_pins>;
170 	rts-gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>;
171 	rs485-rts-active-high;
172 	rs485-rx-during-tx;
173 	rs485-rts-delay = <1 1>;
174 	linux,rs485-enabled-at-boot-time;
178 	pinctrl-names = "default";
179 	pinctrl-0 = <&uart2_pins>;
181 	rts-gpio = <&gpio2 15 GPIO_ACTIVE_HIGH>;
182 	rs485-rts-active-high;
183 	rs485-rts-delay = <1 1>;
184 	linux,rs485-enabled-at-boot-time;
188 	pinctrl-names = "default";
189 	pinctrl-0 = <&uart3_pins>;
194 	pinctrl-names = "default";
195 	pinctrl-0 = <&uart4_pins>;
200 	pinctrl-names = "default";
201 	pinctrl-0 = <&uart5_pins>;
207 	pinctrl-names = "default";
208 	clock-frequency = <400000>;
209 	pinctrl-names = "default";
210 	pinctrl-0 = <&i2c0_pins>;
214 		gpio-controller;
215 		#gpio-cells = <2>;
240 	compatible = "ti,am3352-gpmc";
243 	gpmc,num-waitpins = <2>;
244 	pinctrl-names = "default";
245 	pinctrl-0 = <&gpmc_pins>;
247 	#address-cells = <2>;
248 	#size-cells = <1>;
254 		compatible = "cfi-flash";
255 		linux,mtd-name = "spansion,s29gl010p11t";
256 		bank-width = <2>;
258 		gpmc,mux-add-data = <2>;
260 		gpmc,sync-clk-ps = <0>;
261 		gpmc,cs-on-ns = <0>;
262 		gpmc,cs-rd-off-ns = <160>;
263 		gpmc,cs-wr-off-ns = <160>;
264 		gpmc,adv-on-ns = <10>;
265 		gpmc,adv-rd-off-ns = <30>;
266 		gpmc,adv-wr-off-ns = <30>;
267 		gpmc,oe-on-ns = <40>;
268 		gpmc,oe-off-ns = <160>;
269 		gpmc,we-on-ns = <40>;
270 		gpmc,we-off-ns = <160>;
271 		gpmc,rd-cycle-ns = <160>;
272 		gpmc,wr-cycle-ns = <160>;
273 		gpmc,access-ns = <150>;
274 		gpmc,page-burst-access-ns = <10>;
275 		gpmc,cycle2cycle-samecsen;
276 		gpmc,cycle2cycle-delay-ns = <20>;
277 		gpmc,wr-data-mux-bus-ns = <70>;
278 		gpmc,wr-access-ns = <80>;
280 		#address-cells = <1>;
281 		#size-cells = <1>;
286 		+------------+-->0x00000000-> U-Boot start
288 		|            |-->0x000BFFFF-> U-Boot end
289 		|            |-->0x000C0000-> ENV1 start
291 		|            |-->0x000DFFFF-> ENV1 end
292 		|            |-->0x000E0000-> ENV2 start
294 		|            |-->0x000FFFFF-> ENV2 end
295 		|            |-->0x00100000-> Kernel start
297 		|            |-->0x004FFFFF-> Kernel end
298 		|            |-->0x00500000-> File system start
300 		|            |-->0x01FFFFFF-> File system end
301 		|            |-->0x02000000-> User data start
303 		|            |-->0x03FFFFFF-> User data end
304 		|            |-->0x04000000-> Data storage start
306 		+------------+-->0x08000000-> NOR end (Free end)
309 			label = "boot";
346 		bank-width = <2>;
348 		gpmc,mux-add-data = <2>;
350 		gpmc,sync-clk-ps = <0>;
351 		gpmc,cs-on-ns = <0>;
352 		gpmc,cs-rd-off-ns = <160>;
353 		gpmc,cs-wr-off-ns = <160>;
354 		gpmc,adv-on-ns = <10>;
355 		gpmc,adv-rd-off-ns = <20>;
356 		gpmc,adv-wr-off-ns = <20>;
357 		gpmc,oe-on-ns = <30>;
358 		gpmc,oe-off-ns = <150>;
359 		gpmc,we-on-ns = <30>;
360 		gpmc,we-off-ns = <150>;
361 		gpmc,rd-cycle-ns = <160>;
362 		gpmc,wr-cycle-ns = <160>;
363 		gpmc,access-ns = <130>;
364 		gpmc,page-burst-access-ns = <10>;
365 		gpmc,cycle2cycle-samecsen;
366 		gpmc,cycle2cycle-diffcsen;
367 		gpmc,cycle2cycle-delay-ns = <10>;
368 		gpmc,wr-data-mux-bus-ns = <30>;
369 		gpmc,wr-access-ns = <0>;
381 	ethphy0: ethernet-phy@0 {
385 	ethphy1: ethernet-phy@1 {
391 	phy-handle = <&ethphy0>;
392 	phy-mode = "mii";
397 	phy-handle = <&ethphy1>;
398 	phy-mode = "mii";
404 	vmmc-supply = <&ldo4_reg>;
405 	pinctrl-names = "default";
406 	pinctrl-0 = <&mmc1_pins>;
407 	bus-width = <4>;
408 	cd-gpios = <&gpio3 8 0>;
409 	wp-gpios = <&gpio3 18 0>;
418 			regulator-min-microvolt = <1450000>;
419 			regulator-max-microvolt = <1550000>;
420 			regulator-boot-on;
421 			regulator-always-on;
425 			/* VDD_MPU voltage limits 0.95V - 1.1V with ±4% tolerance */
426 			regulator-name = "vdd_mpu";
427 			regulator-min-microvolt = <915000>;
428 			regulator-max-microvolt = <1140000>;
429 			regulator-boot-on;
430 			regulator-always-on;
434 			/* VDD_CORE voltage limits 0.95V - 1.1V with ±4% tolerance */
435 			regulator-name = "vdd_core";
436 			regulator-min-microvolt = <915000>;
437 			regulator-max-microvolt = <1140000>;
438 			regulator-boot-on;
439 			regulator-always-on;
444 			regulator-min-microvolt = <1750000>;
445 			regulator-max-microvolt = <1870000>;
446 			regulator-boot-on;
447 			regulator-always-on;
452 			regulator-min-microvolt = <3175000>;
453 			regulator-max-microvolt = <3430000>;
454 			regulator-boot-on;
455 			regulator-always-on;
460 			regulator-min-microvolt = <1750000>;
461 			regulator-max-microvolt = <1870000>;
462 			regulator-boot-on;
463 			regulator-always-on;
468 			regulator-min-microvolt = <3175000>;
469 			regulator-max-microvolt = <3430000>;
470 			regulator-boot-on;
471 			regulator-always-on;