Lines Matching +full:0 +full:x2000
22 …bootargs = "earlycon=uart8250,mmio32,0xf0005000,115200n8 console=ttyS0,115200n8 debug print-fatal-…
31 #size-cells = <0>;
33 cpu@0 {
36 reg = <0>;
63 #clock-cells = <0>;
115 ranges = <0x00000000 0x0 0xf0000000 0x10000000>;
120 reg = <0x8a0 0x4>, <0xff0 0x4>;
123 core_clk: core-clk@0 {
125 reg = <0x00 0x10>, <0x14b8 0x4>;
126 #clock-cells = <0>;
140 reg = <0x5000 0x100>;
151 #clock-cells = <0>;
168 #clock-cells = <0>;
174 #clock-cells = <0>;
180 #clock-cells = <0>;
186 #clock-cells = <0>;
192 #clock-cells = <0>;
198 #clock-cells = <0>;
204 #clock-cells = <0>;
210 reg = <0x8000 0x2000>;
229 #size-cells = <0>;
231 phy0: ethernet-phy@0 { /* Micrel KSZ9031 */
232 reg = <0>;
238 compatible = "snps,hsdk-v1.0-ohci", "generic-ohci";
239 reg = <0x60000 0x100>;
246 compatible = "snps,hsdk-v1.0-ehci", "generic-ehci";
247 reg = <0x40000 0x100>;
255 reg = <0xa000 0x400>;
268 reg = <0x20000 0x100>;
270 #size-cells = <0>;
275 cs-gpios = <&creg_gpio 0 GPIO_ACTIVE_LOW>,
278 spi-flash@0 {
280 reg = <0>;
296 reg = <0x14b0 0x4>;
304 reg = <0x3000 0x20>;
306 #size-cells = <0>;
308 gpio_port_a: gpio-controller@0 {
313 reg = <0>;
319 reg = <0x90000 0x4000>;
330 reg = <0x80000 0x400>;
339 snps,priority = <0 1 2 3>;
348 reg = <0x0 0x80000000 0x0 0x40000000>; /* 1 GB lowmem */
349 /* 0x1 0x00000000 0x0 0x40000000>; 1 GB highmem */