Documentation/vm/numa.rst

14 or more CPUs, local memory, and/or IO buses.  For brevity and to
19 Each of the 'cells' may be viewed as an SMP [symmetric multi-processor] subset
20 of the system--although some components necessary for a stand-alone SMP system
22 connected together with some sort of system interconnect--e.g., a crossbar or
23 point-to-point link are common types of NUMA system interconnects.  Both of
24 these types of interconnects can be aggregated to create NUMA platforms with
28 Coherent NUMA or ccNUMA systems.   With ccNUMA systems, all memory is visible
29 to and accessible from any CPU attached to any cell and cache coherency
32 Memory access time and effective memory bandwidth varies depending on how far
33 away the cell containing the CPU or IO bus making the memory access is from the
34 cell containing the target memory.  For example, access to memory by CPUs
35 attached to the same cell will experience faster access times and higher
36 bandwidths than accesses to memory on other, remote cells.  NUMA platforms
39 Platform vendors don't build NUMA systems just to make software developers'
40 lives interesting.  Rather, this architecture is a means to provide scalable
41 memory bandwidth.  However, to achieve scalable memory bandwidth, system and
42 application software must arrange for a large majority of the memory references
43 [cache misses] to be to "local" memory--memory on the same cell, if any--or
44 to the closest cell with memory.
46 This leads to the Linux software view of a NUMA system:
52 CPUs, memory and/or IO buses.  And, again, memory accesses to memory on
53 "closer" nodes--nodes that map to closer cells--will generally experience
54 faster access times and higher effective bandwidth than accesses to more
58 physical cell that has no memory attached, and reassign any CPUs attached to
59 that cell to a node representing a cell that does have memory.  Thus, on
61 a given node will see the same local memory access times and bandwidth.
65 the existing nodes--or the system memory for non-NUMA platforms--into multiple
67 physical memory.  NUMA emluation is useful for testing NUMA kernel and
68 application features on non-NUMA platforms, and as a sort of memory resource
70 [see Documentation/admin-guide/cgroup-v1/cpusets.rst]
72 For each node with memory, Linux constructs an independent memory management
73 subsystem, complete with its own free page lists, in-use page lists, usage
74 statistics and locks to mediate access.  In addition, Linux constructs for
75 each memory zone [one or more of DMA, DMA32, NORMAL, HIGH_MEMORY, MOVABLE],
76 an ordered "zonelist".  A zonelist specifies the zones/nodes to visit when a
78 when a zone has no available memory to satisfy a request, is called
82 memory, Linux must decide whether to order the zonelists such that allocations
83 fall back to the same zone type on a different node, or to a different zone
86 a default Node ordered zonelist. This means it tries to fallback to other zones
89 By default, Linux will attempt to satisfy memory allocation requests from the
90 node to which the CPU that executes the request is assigned.  Specifically,
91 Linux will attempt to allocate from the first node in the appropriate zonelist
97 Local allocation will tend to keep subsequent access to the allocated memory
98 "local" to the underlying physical resources and off the system interconnect--
99 as long as the task on whose behalf the kernel allocated some memory does not
100 later migrate away from that memory.  The Linux scheduler is aware of the
101 NUMA topology of the platform--embodied in the "scheduling domains" data
102 structures [see Documentation/scheduler/sched-domains.rst]--and the scheduler
103 attempts to minimize task migration to distant scheduling domains.  However,
109 to improve NUMA locality using various CPU affinity command line interfaces,
112 allocation behavior using Linux NUMA memory policy. [see
113 :ref:`Documentation/admin-guide/mm/numa_memory_policy.rst <numa_memory_policy>`].
115 System administrators can restrict the CPUs and nodes' memories that a non-
117 using control groups and CPUsets.  [see Documentation/admin-guide/cgroup-v1/cpusets.rst]
120 zones [nodes] with memory in the zonelists.  This means that for a memoryless
121 node the "local memory node"--the node of the first zone in CPU's node's
122 zonelist--will not be the node itself.  Rather, it will be the node that the
123 kernel selected as the nearest node with memory when it built the zonelists.
125 closest available memory.  This is a consequence of the same mechanism that
126 allows such allocations to fallback to other nearby nodes when a node that
127 does contain memory overflows.
130 behavior.  Rather they want to be sure they get memory from the specified node
131 or get notified that the node has no free memory.  This is usually the case when
132 a subsystem allocates per CPU memory resources, for example.
134 A typical model for making such an allocation is to obtain the node id of the
135 node to which the "current CPU" is attached using one of the kernel's
136 numa_node_id() or CPU_to_node() functions and then request memory from only
138 may revert to its own fallback path.  The slab kernel memory allocator is an
139 example of this.  Or, the subsystem may choose to disable or not to enable
143 If the architecture supports--does not hide--memoryless nodes, then CPUs
144 attached to memoryless nodes would always incur the fallback path overhead
145 or some subsystems would fail to initialize if they attempted to allocated
146 memory exclusively from a node without memory.  To support such
148 or cpu_to_mem() function to locate the "local memory node" for the calling or